i965: Enable L3 caching of buffer surfaces.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_vec4_gs_visitor.h

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.h b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.h
index fba0ac61205dc55516372f9ea8266005993614f1..bcb5a2bcfc1a392fc4c8c8f93d49939349a61919 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.h
@@ -32,15 +32,6 @@
 
 #include "brw_vec4.h"
 
-
-struct brw_gs_prog_key
-{
-   struct brw_vec4_prog_key base;
-
-   struct brw_vue_map input_vue_map;
-};
-
-
 /**
  * Scratch data used when compiling a GLSL geometry shader.
  */
@@ -49,8 +40,12 @@ struct brw_gs_compile
    struct brw_vec4_compile base;
    struct brw_gs_prog_key key;
    struct brw_gs_prog_data prog_data;
+   struct brw_vue_map input_vue_map;
 
    struct brw_geometry_program *gp;
+
+   unsigned control_data_bits_per_vertex;
+   unsigned control_data_header_size_bits;
 };
 
 #ifdef __cplusplus
@@ -76,8 +71,8 @@ public:
    vec4_gs_visitor(struct brw_context *brw,
                    struct brw_gs_compile *c,
                    struct gl_shader_program *prog,
-                   struct brw_shader *shader,
-                   void *mem_ctx);
+                   void *mem_ctx,
+                   bool no_spills);
 
 protected:
    virtual dst_reg *make_reg_for_system_value(ir_variable *ir);
@@ -91,10 +86,14 @@ protected:
    virtual void visit(ir_emit_vertex *);
    virtual void visit(ir_end_primitive *);
 
-private:
-   int setup_varying_inputs(int payload_reg, int *attribute_map);
+protected:
+   int setup_varying_inputs(int payload_reg, int *attribute_map,
+                            int attributes_per_reg);
+   void emit_control_data_bits();
+   void set_stream_control_data_bits(unsigned stream_id);
 
    src_reg vertex_count;
+   src_reg control_data_bits;
    const struct brw_gs_compile * const c;
 };