i965/nir/vec4: Implement single-element "mov" operations

[mesa.git] / src / mesa / drivers / dri / i965 / brw_vec4_live_variables.cpp

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_live_variables.cpp b/src/mesa/drivers/dri/i965/brw_vec4_live_variables.cpp
index 66beb21397b7af52265b881bd29d5f51a7e9f52b..cc688ef80834c1c17233f83462dd339d16f49a76 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vec4_live_variables.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_live_variables.cpp
@@ -76,10 +76,13 @@ vec4_live_variables::setup_def_use()
         /* Set use[] for this instruction */
         for (unsigned int i = 0; i < 3; i++) {
            if (inst->src[i].file == GRF) {
-               for (int c = 0; c < 4; c++) {
-                  const unsigned v = var_from_reg(alloc, inst->src[i], c);
-                  if (!BITSET_TEST(bd->def, v))
-                     BITSET_SET(bd->use, v);
+               for (unsigned j = 0; j < inst->regs_read(i); j++) {
+                  for (int c = 0; c < 4; c++) {
+                     const unsigned v =
+                        var_from_reg(alloc, offset(inst->src[i], j), c);
+                     if (!BITSET_TEST(bd->def, v))
+                        BITSET_SET(bd->use, v);
+                  }
                }
            }
         }
@@ -94,13 +97,15 @@ vec4_live_variables::setup_def_use()
          * variable, and thus qualify for being in def[].
          */
         if (inst->dst.file == GRF &&
-            alloc.sizes[inst->dst.reg] == 1 &&
-            !inst->predicate) {
-            for (int c = 0; c < 4; c++) {
-               if (inst->dst.writemask & (1 << c)) {
-                  const unsigned v = var_from_reg(alloc, inst->dst, c);
-                  if (!BITSET_TEST(bd->use, v))
-                     BITSET_SET(bd->def, v);
+            (!inst->predicate || inst->opcode == BRW_OPCODE_SEL)) {
+            for (unsigned i = 0; i < inst->regs_written; i++) {
+               for (int c = 0; c < 4; c++) {
+                  if (inst->dst.writemask & (1 << c)) {
+                     const unsigned v =
+                        var_from_reg(alloc, offset(inst->dst, i), c);
+                     if (!BITSET_TEST(bd->use, v))
+                        BITSET_SET(bd->def, v);
+                  }
                }
             }
          }
@@ -129,27 +134,9 @@ vec4_live_variables::compute_live_variables()
    while (cont) {
       cont = false;
 
-      foreach_block (block, cfg) {
+      foreach_block_reverse (block, cfg) {
          struct block_data *bd = &block_data[block->num];
 
-        /* Update livein */
-        for (int i = 0; i < bitset_words; i++) {
-            BITSET_WORD new_livein = (bd->use[i] |
-                                      (bd->liveout[i] &
-                                       ~bd->def[i]));
-            if (new_livein & ~bd->livein[i]) {
-               bd->livein[i] |= new_livein;
-               cont = true;
-           }
-        }
-         BITSET_WORD new_livein = (bd->flag_use[0] |
-                                   (bd->flag_liveout[0] &
-                                    ~bd->flag_def[0]));
-         if (new_livein & ~bd->flag_livein[0]) {
-            bd->flag_livein[0] |= new_livein;
-            cont = true;
-         }
-
         /* Update liveout */
         foreach_list_typed(bblock_link, child_link, link, &block->children) {
             struct block_data *child_bd = &block_data[child_link->block->num];
@@ -169,6 +156,24 @@ vec4_live_variables::compute_live_variables()
                cont = true;
             }
         }
+
+         /* Update livein */
+         for (int i = 0; i < bitset_words; i++) {
+            BITSET_WORD new_livein = (bd->use[i] |
+                                      (bd->liveout[i] &
+                                       ~bd->def[i]));
+            if (new_livein & ~bd->livein[i]) {
+               bd->livein[i] |= new_livein;
+               cont = true;
+            }
+         }
+         BITSET_WORD new_livein = (bd->flag_use[0] |
+                                   (bd->flag_liveout[0] &
+                                    ~bd->flag_def[0]));
+         if (new_livein & ~bd->flag_livein[0]) {
+            bd->flag_livein[0] |= new_livein;
+            cont = true;
+         }
       }
    }
 }
@@ -179,7 +184,7 @@ vec4_live_variables::vec4_live_variables(const simple_allocator &alloc,
 {
    mem_ctx = ralloc_context(NULL);
 
-   num_vars = alloc.count * 4;
+   num_vars = alloc.total_size * 4;
    block_data = rzalloc_array(mem_ctx, struct block_data, cfg->num_blocks);
 
    bitset_words = BITSET_WORDS(num_vars);
@@ -229,14 +234,14 @@ vec4_visitor::calculate_live_intervals()
    if (this->live_intervals)
       return;
 
-   int *start = ralloc_array(mem_ctx, int, this->alloc.count * 4);
-   int *end = ralloc_array(mem_ctx, int, this->alloc.count * 4);
+   int *start = ralloc_array(mem_ctx, int, this->alloc.total_size * 4);
+   int *end = ralloc_array(mem_ctx, int, this->alloc.total_size * 4);
    ralloc_free(this->virtual_grf_start);
    ralloc_free(this->virtual_grf_end);
    this->virtual_grf_start = start;
    this->virtual_grf_end = end;
 
-   for (unsigned i = 0; i < this->alloc.count * 4; i++) {
+   for (unsigned i = 0; i < this->alloc.total_size * 4; i++) {
       start[i] = MAX_INSTRUCTION;
       end[i] = -1;
    }
@@ -248,20 +253,26 @@ vec4_visitor::calculate_live_intervals()
    foreach_block_and_inst(block, vec4_instruction, inst, cfg) {
       for (unsigned int i = 0; i < 3; i++) {
         if (inst->src[i].file == GRF) {
-            for (int c = 0; c < 4; c++) {
-               const unsigned v = var_from_reg(alloc, inst->src[i], c);
-               start[v] = MIN2(start[v], ip);
-               end[v] = ip;
+            for (unsigned j = 0; j < inst->regs_read(i); j++) {
+               for (int c = 0; c < 4; c++) {
+                  const unsigned v =
+                     var_from_reg(alloc, offset(inst->src[i], j), c);
+                  start[v] = MIN2(start[v], ip);
+                  end[v] = ip;
+               }
             }
         }
       }
 
       if (inst->dst.file == GRF) {
-         for (int c = 0; c < 4; c++) {
-            if (inst->dst.writemask & (1 << c)) {
-               const unsigned v = var_from_reg(alloc, inst->dst, c);
-               start[v] = MIN2(start[v], ip);
-               end[v] = ip;
+         for (unsigned i = 0; i < inst->regs_written; i++) {
+            for (int c = 0; c < 4; c++) {
+               if (inst->dst.writemask & (1 << c)) {
+                  const unsigned v =
+                     var_from_reg(alloc, offset(inst->dst, i), c);
+                  start[v] = MIN2(start[v], ip);
+                  end[v] = ip;
+               }
             }
          }
       }
@@ -325,8 +336,8 @@ vec4_visitor::var_range_end(unsigned v, unsigned n) const
 bool
 vec4_visitor::virtual_grf_interferes(int a, int b)
 {
-   return !((var_range_end(4 * a, 4) <=
-             var_range_start(4 * b, 4)) ||
-            (var_range_end(4 * b, 4) <=
-             var_range_start(4 * a, 4)));
+   return !((var_range_end(4 * alloc.offsets[a], 4 * alloc.sizes[a]) <=
+             var_range_start(4 * alloc.offsets[b], 4 * alloc.sizes[b])) ||
+            (var_range_end(4 * alloc.offsets[b], 4 * alloc.sizes[b]) <=
+             var_range_start(4 * alloc.offsets[a], 4 * alloc.sizes[a])));
 }