#include "brw_vec4.h"
#include "glsl/ir_uniform.h"
extern "C" {
-#include "main/context.h"
-#include "main/macros.h"
-#include "program/prog_parameter.h"
#include "program/sampler.h"
}
ALU1(FBH)
ALU1(FBL)
ALU1(CBIT)
+ALU3(MAD)
/** Gen4 predicated IF. */
vec4_instruction *
{
gl_clip_plane *clip_planes = brw_select_clip_planes(ctx);
- if (brw->gen < 6) {
- /* Pre-Gen6, we compact clip planes. For example, if the user
- * enables just clip planes 0, 1, and 3, we will enable clip planes
- * 0, 1, and 2 in the hardware, and we'll move clip plane 3 to clip
- * plane 2. This simplifies the implementation of the Gen6 clip
- * thread.
- */
- int compacted_clipplane_index = 0;
- for (int i = 0; i < MAX_CLIP_PLANES; ++i) {
- if (!(key->userclip_planes_enabled_gen_4_5 & (1 << i)))
- continue;
-
- this->uniform_vector_size[this->uniforms] = 4;
- this->userplane[compacted_clipplane_index] = dst_reg(UNIFORM, this->uniforms);
- this->userplane[compacted_clipplane_index].type = BRW_REGISTER_TYPE_F;
- for (int j = 0; j < 4; ++j) {
- prog_data->param[this->uniforms * 4 + j] = &clip_planes[i][j];
- }
- ++compacted_clipplane_index;
- ++this->uniforms;
- }
- } else {
- /* In Gen6 and later, we don't compact clip planes, because this
- * simplifies the implementation of gl_ClipDistance.
- */
- for (int i = 0; i < key->nr_userclip_plane_consts; ++i) {
- this->uniform_vector_size[this->uniforms] = 4;
- this->userplane[i] = dst_reg(UNIFORM, this->uniforms);
- this->userplane[i].type = BRW_REGISTER_TYPE_F;
- for (int j = 0; j < 4; ++j) {
- prog_data->param[this->uniforms * 4 + j] = &clip_planes[i][j];
- }
- ++this->uniforms;
+ for (int i = 0; i < key->nr_userclip_plane_consts; ++i) {
+ this->uniform_vector_size[this->uniforms] = 4;
+ this->userplane[i] = dst_reg(UNIFORM, this->uniforms);
+ this->userplane[i].type = BRW_REGISTER_TYPE_F;
+ for (int j = 0; j < 4; ++j) {
+ prog_data->param[this->uniforms * 4 + j] = &clip_planes[i][j];
}
+ ++this->uniforms;
}
}
emit(IF(this->result, src_reg(0), BRW_CONDITIONAL_NZ));
}
-static dst_reg
+dst_reg
with_writemask(dst_reg const & r, int mask)
{
dst_reg result = r;
return result;
}
-void
-vec4_vs_visitor::emit_prolog()
-{
- dst_reg sign_recovery_shift;
- dst_reg normalize_factor;
- dst_reg es3_normalize_factor;
-
- for (int i = 0; i < VERT_ATTRIB_MAX; i++) {
- if (vs_prog_data->inputs_read & BITFIELD64_BIT(i)) {
- uint8_t wa_flags = vs_compile->key.gl_attrib_wa_flags[i];
- dst_reg reg(ATTR, i);
- dst_reg reg_d = reg;
- reg_d.type = BRW_REGISTER_TYPE_D;
- dst_reg reg_ud = reg;
- reg_ud.type = BRW_REGISTER_TYPE_UD;
-
- /* Do GL_FIXED rescaling for GLES2.0. Our GL_FIXED attributes
- * come in as floating point conversions of the integer values.
- */
- if (wa_flags & BRW_ATTRIB_WA_COMPONENT_MASK) {
- dst_reg dst = reg;
- dst.type = brw_type_for_base_type(glsl_type::vec4_type);
- dst.writemask = (1 << (wa_flags & BRW_ATTRIB_WA_COMPONENT_MASK)) - 1;
- emit(MUL(dst, src_reg(dst), src_reg(1.0f / 65536.0f)));
- }
-
- /* Do sign recovery for 2101010 formats if required. */
- if (wa_flags & BRW_ATTRIB_WA_SIGN) {
- if (sign_recovery_shift.file == BAD_FILE) {
- /* shift constant: <22,22,22,30> */
- sign_recovery_shift = dst_reg(this, glsl_type::uvec4_type);
- emit(MOV(with_writemask(sign_recovery_shift, WRITEMASK_XYZ), src_reg(22u)));
- emit(MOV(with_writemask(sign_recovery_shift, WRITEMASK_W), src_reg(30u)));
- }
-
- emit(SHL(reg_ud, src_reg(reg_ud), src_reg(sign_recovery_shift)));
- emit(ASR(reg_d, src_reg(reg_d), src_reg(sign_recovery_shift)));
- }
-
- /* Apply BGRA swizzle if required. */
- if (wa_flags & BRW_ATTRIB_WA_BGRA) {
- src_reg temp = src_reg(reg);
- temp.swizzle = BRW_SWIZZLE4(2,1,0,3);
- emit(MOV(reg, temp));
- }
-
- if (wa_flags & BRW_ATTRIB_WA_NORMALIZE) {
- /* ES 3.0 has different rules for converting signed normalized
- * fixed-point numbers than desktop GL.
- */
- if (_mesa_is_gles3(ctx) && (wa_flags & BRW_ATTRIB_WA_SIGN)) {
- /* According to equation 2.2 of the ES 3.0 specification,
- * signed normalization conversion is done by:
- *
- * f = c / (2^(b-1)-1)
- */
- if (es3_normalize_factor.file == BAD_FILE) {
- /* mul constant: 1 / (2^(b-1) - 1) */
- es3_normalize_factor = dst_reg(this, glsl_type::vec4_type);
- emit(MOV(with_writemask(es3_normalize_factor, WRITEMASK_XYZ),
- src_reg(1.0f / ((1<<9) - 1))));
- emit(MOV(with_writemask(es3_normalize_factor, WRITEMASK_W),
- src_reg(1.0f / ((1<<1) - 1))));
- }
-
- dst_reg dst = reg;
- dst.type = brw_type_for_base_type(glsl_type::vec4_type);
- emit(MOV(dst, src_reg(reg_d)));
- emit(MUL(dst, src_reg(dst), src_reg(es3_normalize_factor)));
- emit_minmax(BRW_CONDITIONAL_G, dst, src_reg(dst), src_reg(-1.0f));
- } else {
- /* The following equations are from the OpenGL 3.2 specification:
- *
- * 2.1 unsigned normalization
- * f = c/(2^n-1)
- *
- * 2.2 signed normalization
- * f = (2c+1)/(2^n-1)
- *
- * Both of these share a common divisor, which is represented by
- * "normalize_factor" in the code below.
- */
- if (normalize_factor.file == BAD_FILE) {
- /* 1 / (2^b - 1) for b=<10,10,10,2> */
- normalize_factor = dst_reg(this, glsl_type::vec4_type);
- emit(MOV(with_writemask(normalize_factor, WRITEMASK_XYZ),
- src_reg(1.0f / ((1<<10) - 1))));
- emit(MOV(with_writemask(normalize_factor, WRITEMASK_W),
- src_reg(1.0f / ((1<<2) - 1))));
- }
-
- dst_reg dst = reg;
- dst.type = brw_type_for_base_type(glsl_type::vec4_type);
- emit(MOV(dst, src_reg((wa_flags & BRW_ATTRIB_WA_SIGN) ? reg_d : reg_ud)));
-
- /* For signed normalization, we want the numerator to be 2c+1. */
- if (wa_flags & BRW_ATTRIB_WA_SIGN) {
- emit(MUL(dst, src_reg(dst), src_reg(2.0f)));
- emit(ADD(dst, src_reg(dst), src_reg(1.0f)));
- }
-
- emit(MUL(dst, src_reg(dst), src_reg(normalize_factor)));
- }
- }
-
- if (wa_flags & BRW_ATTRIB_WA_SCALE) {
- dst_reg dst = reg;
- dst.type = brw_type_for_base_type(glsl_type::vec4_type);
- emit(MOV(dst, src_reg((wa_flags & BRW_ATTRIB_WA_SIGN) ? reg_d : reg_ud)));
- }
- }
- }
-}
-
-
-dst_reg *
-vec4_vs_visitor::make_reg_for_system_value(ir_variable *ir)
-{
- /* VertexID is stored by the VF as the last vertex element, but
- * we don't represent it with a flag in inputs_read, so we call
- * it VERT_ATTRIB_MAX, which setup_attributes() picks up on.
- */
- dst_reg *reg = new(mem_ctx) dst_reg(ATTR, VERT_ATTRIB_MAX);
- vs_prog_data->uses_vertexid = true;
-
- switch (ir->location) {
- case SYSTEM_VALUE_VERTEX_ID:
- reg->writemask = WRITEMASK_X;
- break;
- case SYSTEM_VALUE_INSTANCE_ID:
- reg->writemask = WRITEMASK_Y;
- break;
- default:
- assert(!"not reached");
- break;
- }
-
- return reg;
-}
-
void
vec4_visitor::visit(ir_variable *ir)
break;
case ir_unop_neg:
op[0].negate = !op[0].negate;
- this->result = op[0];
+ emit(MOV(result_dst, op[0]));
break;
case ir_unop_abs:
op[0].abs = true;
op[0].negate = false;
- this->result = op[0];
+ emit(MOV(result_dst, op[0]));
break;
case ir_unop_sign:
src_reg packed_consts = src_reg(this, glsl_type::vec4_type);
packed_consts.type = result.type;
src_reg surf_index =
- src_reg(SURF_INDEX_VS_UBO(uniform_block->value.u[0]));
+ src_reg(SURF_INDEX_VEC4_UBO(uniform_block->value.u[0]));
if (const_offset_ir) {
offset = src_reg(const_offset / 16);
} else {
assert(!"should have been lowered by vec_index_to_cond_assign");
break;
+ case ir_triop_fma:
+ op[0] = fix_3src_operand(op[0]);
+ op[1] = fix_3src_operand(op[1]);
+ op[2] = fix_3src_operand(op[2]);
+ /* Note that the instruction's argument order is reversed from GLSL
+ * and the IR.
+ */
+ emit(MAD(result_dst, op[2], op[1], op[0]));
+ break;
+
case ir_triop_lrp:
op[0] = fix_3src_operand(op[0]);
op[1] = fix_3src_operand(op[1]);
emit(MOV(dst_reg(MRF, param_base, ir->coordinate->type, coord_mask),
coordinate));
}
- emit(MOV(dst_reg(MRF, param_base, ir->coordinate->type, zero_mask),
- src_reg(0)));
+ if (zero_mask != 0) {
+ emit(MOV(dst_reg(MRF, param_base, ir->coordinate->type, zero_mask),
+ src_reg(0)));
+ }
/* Load the shadow comparitor */
if (ir->shadow_comparitor && ir->op != ir_txd) {
emit(MOV(dst_reg(MRF, param_base + 1, ir->shadow_comparitor->type,
}
} else /* brw->gen == 4 */ {
mrf = param_base;
- writemask = WRITEMASK_Z;
+ writemask = WRITEMASK_W;
}
emit(MOV(dst_reg(MRF, mrf, lod_type, writemask), lod));
} else if (ir->op == ir_txf) {
}
int zero_mask = 0, one_mask = 0, copy_mask = 0;
- int swizzle[4];
+ int swizzle[4] = {0};
for (int i = 0; i < 4; i++) {
switch (GET_SWZ(s, i)) {
emit(BRW_OPCODE_ENDIF);
}
+void
+vec4_visitor::visit(ir_emit_vertex *)
+{
+ assert(!"not reached");
+}
+
+void
+vec4_visitor::visit(ir_end_primitive *)
+{
+ assert(!"not reached");
+}
+
void
vec4_visitor::emit_ndc_computation()
{
dst_reg header1 = dst_reg(this, glsl_type::uvec4_type);
dst_reg header1_w = header1;
header1_w.writemask = WRITEMASK_W;
- GLuint i;
emit(MOV(header1, 0u));
emit(AND(header1_w, src_reg(header1_w), 0x7ff << 8));
}
- current_annotation = "Clipping flags";
- for (i = 0; i < key->nr_userclip_plane_consts; i++) {
- vec4_instruction *inst;
- gl_varying_slot slot = (prog_data->vue_map.slots_valid & VARYING_BIT_CLIP_VERTEX)
- ? VARYING_SLOT_CLIP_VERTEX : VARYING_SLOT_POS;
+ if (key->userclip_active) {
+ current_annotation = "Clipping flags";
+ dst_reg flags0 = dst_reg(this, glsl_type::uint_type);
+ dst_reg flags1 = dst_reg(this, glsl_type::uint_type);
- inst = emit(DP4(dst_null_f(), src_reg(output_reg[slot]),
- src_reg(this->userplane[i])));
- inst->conditional_mod = BRW_CONDITIONAL_L;
+ emit(CMP(dst_null_f(), src_reg(output_reg[VARYING_SLOT_CLIP_DIST0]), src_reg(0.0f), BRW_CONDITIONAL_L));
+ emit(VS_OPCODE_UNPACK_FLAGS_SIMD4X2, flags0, src_reg(0));
+ emit(OR(header1_w, src_reg(header1_w), src_reg(flags0)));
- inst = emit(OR(header1_w, src_reg(header1_w), 1u << i));
- inst->predicate = BRW_PREDICATE_NORMAL;
+ emit(CMP(dst_null_f(), src_reg(output_reg[VARYING_SLOT_CLIP_DIST1]), src_reg(0.0f), BRW_CONDITIONAL_L));
+ emit(VS_OPCODE_UNPACK_FLAGS_SIMD4X2, flags1, src_reg(0));
+ emit(SHL(flags1, src_reg(flags1), src_reg(4)));
+ emit(OR(header1_w, src_reg(header1_w), src_reg(flags1)));
}
/* i965 clipping workaround:
}
void
-vec4_visitor::emit_clip_distances(struct brw_reg reg, int offset)
+vec4_visitor::emit_clip_distances(dst_reg reg, int offset)
{
- if (brw->gen < 6) {
- /* Clip distance slots are set aside in gen5, but they are not used. It
- * is not clear whether we actually need to set aside space for them,
- * but the performance cost is negligible.
- */
- return;
- }
-
/* From the GLSL 1.30 spec, section 7.1 (Vertex Shader Special Variables):
*
* "If a linked set of shaders forming the vertex stage contains no
for (int i = 0; i + offset < key->nr_userclip_plane_consts && i < 4;
++i) {
- emit(DP4(dst_reg(brw_writemask(reg, 1 << i)),
+ reg.writemask = 1 << i;
+ emit(DP4(reg,
src_reg(output_reg[clip_vertex]),
src_reg(this->userplane[i + offset])));
}
current_annotation = "gl_Position";
emit(MOV(reg, src_reg(output_reg[VARYING_SLOT_POS])));
break;
- case VARYING_SLOT_CLIP_DIST0:
- case VARYING_SLOT_CLIP_DIST1:
- if (this->key->uses_clip_distance) {
- emit_generic_urb_slot(reg, varying);
- } else {
- current_annotation = "user clip distances";
- emit_clip_distances(hw_reg, (varying - VARYING_SLOT_CLIP_DIST0) * 4);
- }
- break;
case VARYING_SLOT_EDGE:
/* This is present when doing unfilled polygons. We're supposed to copy
* the edge flag from the user-provided vertex array
return mlen;
}
-void
-vec4_vs_visitor::emit_urb_write_header(int mrf)
-{
- /* No need to do anything for VS; an implied write to this MRF will be
- * performed by VS_OPCODE_URB_WRITE.
- */
- (void) mrf;
-}
-
-vec4_instruction *
-vec4_vs_visitor::emit_urb_write_opcode(bool complete)
-{
- /* For VS, the URB writes end the thread. */
- if (complete) {
- if (INTEL_DEBUG & DEBUG_SHADER_TIME)
- emit_shader_time_end();
- }
-
- vec4_instruction *inst = emit(VS_OPCODE_URB_WRITE);
- inst->eot = complete;
-
- return inst;
-}
/**
* Generates the VUE payload plus the necessary URB write instructions to
emit_ndc_computation();
}
+ /* Lower legacy ff and ClipVertex clipping to clip distances */
+ if (key->userclip_active && !key->uses_clip_distance) {
+ current_annotation = "user clip distances";
+
+ output_reg[VARYING_SLOT_CLIP_DIST0] = dst_reg(this, glsl_type::vec4_type);
+ output_reg[VARYING_SLOT_CLIP_DIST1] = dst_reg(this, glsl_type::vec4_type);
+
+ emit_clip_distances(output_reg[VARYING_SLOT_CLIP_DIST0], 0);
+ emit_clip_distances(output_reg[VARYING_SLOT_CLIP_DIST1], 4);
+ }
+
/* Set up the VUE data for the first URB write */
int slot;
for (slot = 0; slot < prog_data->vue_map.num_slots; ++slot) {
}
}
-void
-vec4_vs_visitor::emit_thread_end()
-{
- /* For VS, we always end the thread by emitting a single vertex.
- * emit_urb_write_opcode() will take care of setting the eot flag on the
- * SEND instruction.
- */
- emit_vertex();
-}
src_reg
vec4_visitor::get_scratch_offset(vec4_instruction *inst,
int base_offset)
{
int reg_offset = base_offset + orig_src.reg_offset;
- src_reg index = src_reg((unsigned)SURF_INDEX_VERT_CONST_BUFFER);
+ src_reg index = src_reg((unsigned)SURF_INDEX_VEC4_CONST_BUFFER);
src_reg offset = get_pull_constant_offset(inst, orig_src.reladdr, reg_offset);
vec4_instruction *load;
: debug_flag(debug_flag)
{
this->brw = brw;
- this->intel = &brw->intel;
- this->ctx = &intel->ctx;
+ this->ctx = &brw->ctx;
this->shader_prog = shader_prog;
this->shader = shader;
}
-vec4_vs_visitor::vec4_vs_visitor(struct brw_context *brw,
- struct brw_vs_compile *vs_compile,
- struct brw_vs_prog_data *vs_prog_data,
- struct gl_shader_program *prog,
- struct brw_shader *shader,
- void *mem_ctx)
- : vec4_visitor(brw, &vs_compile->base, &vs_compile->vp->program.Base,
- &vs_compile->key.base, &vs_prog_data->base, prog, shader,
- mem_ctx, INTEL_DEBUG & DEBUG_VS),
- vs_compile(vs_compile),
- vs_prog_data(vs_prog_data)
-{
-}
-
-
void
vec4_visitor::fail(const char *format, ...)
{
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