i965: Store uniform constant values in a gl_constant_value instead of float

[mesa.git] / src / mesa / drivers / dri / i965 / brw_vec4_vp.cpp

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_vp.cpp b/src/mesa/drivers/dri/i965/brw_vec4_vp.cpp
index 95b3970244497b1256ae103a5e4e26460325fb5b..85f2de577fc5fd77fe51b5cf1333063cc784f5e8 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vec4_vp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_vp.cpp
@@ -29,6 +29,7 @@
 
 #include "brw_context.h"
 #include "brw_vec4.h"
+#include "brw_vs.h"
 extern "C" {
 #include "program/prog_parameter.h"
 #include "program/prog_print.h"
@@ -36,7 +37,7 @@ extern "C" {
 using namespace brw;
 
 void
-vec4_visitor::emit_vp_sop(uint32_t conditional_mod,
+vec4_visitor::emit_vp_sop(enum brw_conditional_mod conditional_mod,
                           dst_reg dst, src_reg src0, src_reg src1,
                           src_reg one)
 {
@@ -49,21 +50,6 @@ vec4_visitor::emit_vp_sop(uint32_t conditional_mod,
    inst->predicate = BRW_PREDICATE_NORMAL;
 }
 
-/**
- * Reswizzle a given source register.
- * \sa brw_swizzle().
- */
-static inline src_reg
-reswizzle(src_reg orig, unsigned x, unsigned y, unsigned z, unsigned w)
-{
-   src_reg t = orig;
-   t.swizzle = BRW_SWIZZLE4(BRW_GET_SWZ(orig.swizzle, x),
-                            BRW_GET_SWZ(orig.swizzle, y),
-                            BRW_GET_SWZ(orig.swizzle, z),
-                            BRW_GET_SWZ(orig.swizzle, w));
-   return t;
-}
-
 void
 vec4_vs_visitor::emit_program_code()
 {
@@ -111,7 +97,7 @@ vec4_vs_visitor::emit_program_code()
          break;
 
       case OPCODE_ARL:
-         if (intel->gen >= 6) {
+         if (brw->gen >= 6) {
             dst.writemask = WRITEMASK_X;
             dst_reg dst_f = dst;
             dst_f.type = BRW_REGISTER_TYPE_F;
@@ -160,7 +146,7 @@ vec4_vs_visitor::emit_program_code()
             /* tmp_d = floor(src[0].x) */
             src_reg tmp_d = src_reg(this, glsl_type::ivec4_type);
             assert(tmp_d.type == BRW_REGISTER_TYPE_D);
-            emit(RNDD(dst_reg(tmp_d), reswizzle(src[0], 0, 0, 0, 0)));
+            emit(RNDD(dst_reg(tmp_d), swizzle(src[0], BRW_SWIZZLE_XXXX)));
 
             /* result[0] = 2.0 ^ tmp */
             /* Adjust exponent for floating point: exp += 127 */
@@ -227,7 +213,7 @@ vec4_vs_visitor::emit_program_code()
             result.writemask = WRITEMASK_YZ;
             emit(MOV(result, src_reg(0.0f)));
 
-            src_reg tmp_x = reswizzle(src[0], 0, 0, 0, 0);
+            src_reg tmp_x = swizzle(src[0], BRW_SWIZZLE_XXXX);
 
             emit(CMP(dst_null_d(), tmp_x, src_reg(0.0f), BRW_CONDITIONAL_G));
             emit(IF(BRW_PREDICATE_NORMAL));
@@ -239,14 +225,14 @@ vec4_vs_visitor::emit_program_code()
 
             if (vpi->DstReg.WriteMask & WRITEMASK_Z) {
                /* if (tmp.y < 0) tmp.y = 0; */
-               src_reg tmp_y = reswizzle(src[0], 1, 1, 1, 1);
+               src_reg tmp_y = swizzle(src[0], BRW_SWIZZLE_YYYY);
                result.writemask = WRITEMASK_Z;
                emit_minmax(BRW_CONDITIONAL_G, result, tmp_y, src_reg(0.0f));
 
                src_reg clamped_y(result);
                clamped_y.swizzle = BRW_SWIZZLE_ZZZZ;
 
-               src_reg tmp_w = reswizzle(src[0], 3, 3, 3, 3);
+               src_reg tmp_w = swizzle(src[0], BRW_SWIZZLE_WWWW);
 
                emit_math(SHADER_OPCODE_POW, result, clamped_y, tmp_w);
             }
@@ -260,7 +246,7 @@ vec4_vs_visitor::emit_program_code()
          result.type = BRW_REGISTER_TYPE_UD;
          src_reg result_src = src_reg(result);
 
-         src_reg arg0_ud = reswizzle(src[0], 0, 0, 0, 0);
+         src_reg arg0_ud = swizzle(src[0], BRW_SWIZZLE_XXXX);
          arg0_ud.type = BRW_REGISTER_TYPE_UD;
 
          /* Perform mant = frexpf(fabsf(x), &exp), adjust exp and mnt
@@ -382,11 +368,11 @@ vec4_vs_visitor::emit_program_code()
          src_reg t2 = src_reg(this, glsl_type::vec4_type);
 
          emit(MUL(dst_reg(t1),
-                  reswizzle(src[0], 1, 2, 0, 3),
-                  reswizzle(src[1], 2, 0, 1, 3)));
+                  swizzle(src[0], BRW_SWIZZLE_YZXW),
+                  swizzle(src[1], BRW_SWIZZLE_ZXYW)));
          emit(MUL(dst_reg(t2),
-                  reswizzle(src[0], 2, 0, 1, 3),
-                  reswizzle(src[1], 1, 2, 0, 3)));
+                  swizzle(src[0], BRW_SWIZZLE_ZXYW),
+                  swizzle(src[1], BRW_SWIZZLE_YZXW)));
          t2.negate = true;
          emit(ADD(dst, t1, t2));
          break;
@@ -414,10 +400,10 @@ vec4_vs_visitor::emit_program_code()
          vs_compile->vp->program.Base.Parameters;
       unsigned i;
       for (i = 0; i < params->NumParameters * 4; i++) {
-         prog_data->pull_param[i] =
-            &params->ParameterValues[i / 4][i % 4].f;
+         stage_prog_data->pull_param[i] =
+            &params->ParameterValues[i / 4][i % 4];
       }
-      prog_data->nr_pull_params = i;
+      stage_prog_data->nr_pull_params = i;
    }
 }
 
@@ -445,8 +431,8 @@ vec4_vs_visitor::setup_vp_regs()
       this->uniform_size[this->uniforms] = 1; /* 1 vec4 */
       this->uniform_vector_size[this->uniforms] = components;
       for (unsigned i = 0; i < 4; i++) {
-         prog_data->param[this->uniforms * 4 + i] = i >= components
-            ? 0 : &plist->ParameterValues[p][i].f;
+         stage_prog_data->param[this->uniforms * 4 + i] = i >= components
+            ? 0 : &plist->ParameterValues[p][i];
       }
       this->uniforms++; /* counted in vec4 units */
    }
@@ -492,8 +478,7 @@ vec4_vs_visitor::get_vp_dst_reg(const prog_dst_register &dst)
       return dst_null_f();
 
    default:
-      assert("vec4_vp: bad destination register file");
-      return dst_reg(this, glsl_type::vec4_type);
+      unreachable("vec4_vp: bad destination register file");
    }
 
    result.writemask = dst.WriteMask;
@@ -547,7 +532,7 @@ vec4_vs_visitor::get_vp_src_reg(const prog_src_register &src)
          dst_reladdr.writemask = WRITEMASK_X;
          emit(ADD(dst_reladdr, this->vp_addr_reg, src_reg(src.Index)));
 
-         if (intel->gen < 6)
+         if (brw->gen < 6)
             emit(MUL(dst_reladdr, reladdr, src_reg(16)));
 
       #if 0
@@ -559,12 +544,19 @@ vec4_vs_visitor::get_vp_src_reg(const prog_src_register &src)
       #endif
 
          result = src_reg(this, glsl_type::vec4_type);
-         src_reg surf_index = src_reg(unsigned(SURF_INDEX_VERT_CONST_BUFFER));
-         vec4_instruction *load =
-            new(mem_ctx) vec4_instruction(this, VS_OPCODE_PULL_CONSTANT_LOAD,
-                                          dst_reg(result), surf_index, reladdr);
-         load->base_mrf = 14;
-         load->mlen = 1;
+         src_reg surf_index = src_reg(unsigned(prog_data->base.binding_table.pull_constants_start));
+         vec4_instruction *load;
+         if (brw->gen >= 7) {
+            load = new(mem_ctx)
+               vec4_instruction(this, VS_OPCODE_PULL_CONSTANT_LOAD_GEN7,
+                                dst_reg(result), surf_index, reladdr);
+         } else {
+            load = new(mem_ctx)
+               vec4_instruction(this, VS_OPCODE_PULL_CONSTANT_LOAD,
+                                dst_reg(result), surf_index, reladdr);
+            load->base_mrf = 14;
+            load->mlen = 1;
+         }
          emit(load);
          break;
       }