#include "glsl/ralloc.h"
static inline void assign_vue_slot(struct brw_vue_map *vue_map,
- int vert_result)
+ int varying)
{
- /* Make sure this vert_result hasn't been assigned a slot already */
- assert (vue_map->vert_result_to_slot[vert_result] == -1);
+ /* Make sure this varying hasn't been assigned a slot already */
+ assert (vue_map->varying_to_slot[varying] == -1);
- vue_map->vert_result_to_slot[vert_result] = vue_map->num_slots;
- vue_map->slot_to_vert_result[vue_map->num_slots++] = vert_result;
+ vue_map->varying_to_slot[varying] = vue_map->num_slots;
+ vue_map->slot_to_varying[vue_map->num_slots++] = varying;
}
/**
int i;
vue_map->num_slots = 0;
- for (i = 0; i < BRW_VERT_RESULT_MAX; ++i) {
- vue_map->vert_result_to_slot[i] = -1;
- vue_map->slot_to_vert_result[i] = BRW_VERT_RESULT_MAX;
+ for (i = 0; i < BRW_VARYING_SLOT_MAX; ++i) {
+ vue_map->varying_to_slot[i] = -1;
+ vue_map->slot_to_varying[i] = BRW_VARYING_SLOT_MAX;
}
/* VUE header: format depends on chip generation and whether clipping is
* dword 4-7 is ndc position
* dword 8-11 is the first vertex data.
*/
- assign_vue_slot(vue_map, VERT_RESULT_PSIZ);
- assign_vue_slot(vue_map, BRW_VERT_RESULT_NDC);
- assign_vue_slot(vue_map, VERT_RESULT_HPOS);
+ assign_vue_slot(vue_map, VARYING_SLOT_PSIZ);
+ assign_vue_slot(vue_map, BRW_VARYING_SLOT_NDC);
+ assign_vue_slot(vue_map, VARYING_SLOT_POS);
break;
case 5:
/* There are 20 DWs (D0-D19) in VUE header on Ironlake:
* dword 24-27 is the first vertex data we fill.
*
* Note: future pipeline stages expect 4D space position to be
- * contiguous with the other vert_results, so we make dword 24-27 a
+ * contiguous with the other varyings, so we make dword 24-27 a
* duplicate copy of the 4D space position.
*/
- assign_vue_slot(vue_map, VERT_RESULT_PSIZ);
- assign_vue_slot(vue_map, BRW_VERT_RESULT_NDC);
- assign_vue_slot(vue_map, BRW_VERT_RESULT_HPOS_DUPLICATE);
- assign_vue_slot(vue_map, VERT_RESULT_CLIP_DIST0);
- assign_vue_slot(vue_map, VERT_RESULT_CLIP_DIST1);
- assign_vue_slot(vue_map, BRW_VERT_RESULT_PAD);
- assign_vue_slot(vue_map, VERT_RESULT_HPOS);
+ assign_vue_slot(vue_map, VARYING_SLOT_PSIZ);
+ assign_vue_slot(vue_map, BRW_VARYING_SLOT_NDC);
+ assign_vue_slot(vue_map, BRW_VARYING_SLOT_POS_DUPLICATE);
+ assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST0);
+ assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST1);
+ assign_vue_slot(vue_map, BRW_VARYING_SLOT_PAD);
+ assign_vue_slot(vue_map, VARYING_SLOT_POS);
break;
case 6:
case 7:
* enabled.
* dword 8-11 or 16-19 is the first vertex element data we fill.
*/
- assign_vue_slot(vue_map, VERT_RESULT_PSIZ);
- assign_vue_slot(vue_map, VERT_RESULT_HPOS);
+ assign_vue_slot(vue_map, VARYING_SLOT_PSIZ);
+ assign_vue_slot(vue_map, VARYING_SLOT_POS);
if (c->key.userclip_active) {
- assign_vue_slot(vue_map, VERT_RESULT_CLIP_DIST0);
- assign_vue_slot(vue_map, VERT_RESULT_CLIP_DIST1);
+ assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST0);
+ assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST1);
}
/* front and back colors need to be consecutive so that we can use
* ATTRIBUTE_SWIZZLE_INPUTATTR_FACING to swizzle them when doing
* two-sided color.
*/
- if (outputs_written & BITFIELD64_BIT(VERT_RESULT_COL0))
- assign_vue_slot(vue_map, VERT_RESULT_COL0);
- if (outputs_written & BITFIELD64_BIT(VERT_RESULT_BFC0))
- assign_vue_slot(vue_map, VERT_RESULT_BFC0);
- if (outputs_written & BITFIELD64_BIT(VERT_RESULT_COL1))
- assign_vue_slot(vue_map, VERT_RESULT_COL1);
- if (outputs_written & BITFIELD64_BIT(VERT_RESULT_BFC1))
- assign_vue_slot(vue_map, VERT_RESULT_BFC1);
+ if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_COL0))
+ assign_vue_slot(vue_map, VARYING_SLOT_COL0);
+ if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC0))
+ assign_vue_slot(vue_map, VARYING_SLOT_BFC0);
+ if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_COL1))
+ assign_vue_slot(vue_map, VARYING_SLOT_COL1);
+ if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC1))
+ assign_vue_slot(vue_map, VARYING_SLOT_BFC1);
break;
default:
assert (!"VUE map not known for this chip generation");
* assign them contiguously. Don't reassign outputs that already have a
* slot.
*
- * Also, prior to Gen6, don't assign a slot for VERT_RESULT_CLIP_VERTEX,
- * since it is unsupported. In Gen6 and above, VERT_RESULT_CLIP_VERTEX may
+ * Also, prior to Gen6, don't assign a slot for VARYING_SLOT_CLIP_VERTEX,
+ * since it is unsupported. In Gen6 and above, VARYING_SLOT_CLIP_VERTEX may
* be needed for transform feedback; since we don't want to have to
* recompute the VUE map (and everything that depends on it) when transform
* feedback is enabled or disabled, just go ahead and assign a slot for it.
*/
- for (int i = 0; i < VERT_RESULT_MAX; ++i) {
- if (intel->gen < 6 && i == VERT_RESULT_CLIP_VERTEX)
+ for (int i = 0; i < VARYING_SLOT_MAX; ++i) {
+ if (intel->gen < 6 && i == VARYING_SLOT_CLIP_VERTEX)
continue;
if ((outputs_written & BITFIELD64_BIT(i)) &&
- vue_map->vert_result_to_slot[i] == -1) {
+ vue_map->varying_to_slot[i] == -1) {
assign_vue_slot(vue_map, i);
}
}
c.prog_data.inputs_read = vp->program.Base.InputsRead;
if (c.key.copy_edgeflag) {
- c.prog_data.outputs_written |= BITFIELD64_BIT(VERT_RESULT_EDGE);
+ c.prog_data.outputs_written |= BITFIELD64_BIT(VARYING_SLOT_EDGE);
c.prog_data.inputs_read |= VERT_BIT_EDGEFLAG;
}
*/
for (i = 0; i < 8; i++) {
if (c.key.point_coord_replace & (1 << i))
- c.prog_data.outputs_written |= BITFIELD64_BIT(VERT_RESULT_TEX0 + i);
+ c.prog_data.outputs_written |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + i);
}
}
projects / mesa.git / blobdiff