#include "glsl/ralloc.h"
static inline void assign_vue_slot(struct brw_vue_map *vue_map,
- int vert_result)
+ int varying)
{
- /* Make sure this vert_result hasn't been assigned a slot already */
- assert (vue_map->vert_result_to_slot[vert_result] == -1);
+ /* Make sure this varying hasn't been assigned a slot already */
+ assert (vue_map->varying_to_slot[varying] == -1);
- vue_map->vert_result_to_slot[vert_result] = vue_map->num_slots;
- vue_map->slot_to_vert_result[vue_map->num_slots++] = vert_result;
+ vue_map->varying_to_slot[varying] = vue_map->num_slots;
+ vue_map->slot_to_varying[vue_map->num_slots++] = varying;
}
/**
* Compute the VUE map for vertex shader program.
+ *
+ * Note that consumers of this map using cache keys must include
+ * prog_data->userclip and prog_data->outputs_written in their key
+ * (generated by CACHE_NEW_VS_PROG).
*/
-void
-brw_compute_vue_map(struct brw_vue_map *vue_map,
- const struct intel_context *intel,
- bool userclip_active,
- GLbitfield64 outputs_written)
+static void
+brw_compute_vue_map(struct brw_context *brw, struct brw_vs_compile *c)
{
+ const struct intel_context *intel = &brw->intel;
+ struct brw_vue_map *vue_map = &c->prog_data.vue_map;
+ GLbitfield64 outputs_written = c->prog_data.outputs_written;
int i;
vue_map->num_slots = 0;
- for (i = 0; i < BRW_VERT_RESULT_MAX; ++i) {
- vue_map->vert_result_to_slot[i] = -1;
- vue_map->slot_to_vert_result[i] = BRW_VERT_RESULT_MAX;
+ for (i = 0; i < BRW_VARYING_SLOT_MAX; ++i) {
+ vue_map->varying_to_slot[i] = -1;
+ vue_map->slot_to_varying[i] = BRW_VARYING_SLOT_MAX;
}
/* VUE header: format depends on chip generation and whether clipping is
* dword 4-7 is ndc position
* dword 8-11 is the first vertex data.
*/
- assign_vue_slot(vue_map, VERT_RESULT_PSIZ);
- assign_vue_slot(vue_map, BRW_VERT_RESULT_NDC);
- assign_vue_slot(vue_map, VERT_RESULT_HPOS);
+ assign_vue_slot(vue_map, VARYING_SLOT_PSIZ);
+ assign_vue_slot(vue_map, BRW_VARYING_SLOT_NDC);
+ assign_vue_slot(vue_map, VARYING_SLOT_POS);
break;
case 5:
/* There are 20 DWs (D0-D19) in VUE header on Ironlake:
* dword 24-27 is the first vertex data we fill.
*
* Note: future pipeline stages expect 4D space position to be
- * contiguous with the other vert_results, so we make dword 24-27 a
+ * contiguous with the other varyings, so we make dword 24-27 a
* duplicate copy of the 4D space position.
*/
- assign_vue_slot(vue_map, VERT_RESULT_PSIZ);
- assign_vue_slot(vue_map, BRW_VERT_RESULT_NDC);
- assign_vue_slot(vue_map, BRW_VERT_RESULT_HPOS_DUPLICATE);
- assign_vue_slot(vue_map, VERT_RESULT_CLIP_DIST0);
- assign_vue_slot(vue_map, VERT_RESULT_CLIP_DIST1);
- assign_vue_slot(vue_map, BRW_VERT_RESULT_PAD);
- assign_vue_slot(vue_map, VERT_RESULT_HPOS);
+ assign_vue_slot(vue_map, VARYING_SLOT_PSIZ);
+ assign_vue_slot(vue_map, BRW_VARYING_SLOT_NDC);
+ assign_vue_slot(vue_map, BRW_VARYING_SLOT_POS_DUPLICATE);
+ assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST0);
+ assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST1);
+ assign_vue_slot(vue_map, BRW_VARYING_SLOT_PAD);
+ assign_vue_slot(vue_map, VARYING_SLOT_POS);
break;
case 6:
case 7:
* enabled.
* dword 8-11 or 16-19 is the first vertex element data we fill.
*/
- assign_vue_slot(vue_map, VERT_RESULT_PSIZ);
- assign_vue_slot(vue_map, VERT_RESULT_HPOS);
- if (userclip_active) {
- assign_vue_slot(vue_map, VERT_RESULT_CLIP_DIST0);
- assign_vue_slot(vue_map, VERT_RESULT_CLIP_DIST1);
+ assign_vue_slot(vue_map, VARYING_SLOT_PSIZ);
+ assign_vue_slot(vue_map, VARYING_SLOT_POS);
+ if (c->key.userclip_active) {
+ assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST0);
+ assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST1);
}
/* front and back colors need to be consecutive so that we can use
* ATTRIBUTE_SWIZZLE_INPUTATTR_FACING to swizzle them when doing
* two-sided color.
*/
- if (outputs_written & BITFIELD64_BIT(VERT_RESULT_COL0))
- assign_vue_slot(vue_map, VERT_RESULT_COL0);
- if (outputs_written & BITFIELD64_BIT(VERT_RESULT_BFC0))
- assign_vue_slot(vue_map, VERT_RESULT_BFC0);
- if (outputs_written & BITFIELD64_BIT(VERT_RESULT_COL1))
- assign_vue_slot(vue_map, VERT_RESULT_COL1);
- if (outputs_written & BITFIELD64_BIT(VERT_RESULT_BFC1))
- assign_vue_slot(vue_map, VERT_RESULT_BFC1);
+ if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_COL0))
+ assign_vue_slot(vue_map, VARYING_SLOT_COL0);
+ if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC0))
+ assign_vue_slot(vue_map, VARYING_SLOT_BFC0);
+ if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_COL1))
+ assign_vue_slot(vue_map, VARYING_SLOT_COL1);
+ if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC1))
+ assign_vue_slot(vue_map, VARYING_SLOT_BFC1);
break;
default:
assert (!"VUE map not known for this chip generation");
* assign them contiguously. Don't reassign outputs that already have a
* slot.
*
- * Also, don't assign a slot for VERT_RESULT_CLIP_VERTEX, since it is
- * unsupported in pre-GEN6, and in GEN6+ the vertex shader converts it into
- * clip distances.
+ * Also, prior to Gen6, don't assign a slot for VARYING_SLOT_CLIP_VERTEX,
+ * since it is unsupported. In Gen6 and above, VARYING_SLOT_CLIP_VERTEX may
+ * be needed for transform feedback; since we don't want to have to
+ * recompute the VUE map (and everything that depends on it) when transform
+ * feedback is enabled or disabled, just go ahead and assign a slot for it.
*/
- for (int i = 0; i < VERT_RESULT_MAX; ++i) {
+ for (int i = 0; i < VARYING_SLOT_MAX; ++i) {
+ if (intel->gen < 6 && i == VARYING_SLOT_CLIP_VERTEX)
+ continue;
if ((outputs_written & BITFIELD64_BIT(i)) &&
- vue_map->vert_result_to_slot[i] == -1 &&
- i != VERT_RESULT_CLIP_VERTEX) {
+ vue_map->varying_to_slot[i] == -1) {
assign_vue_slot(vue_map, i);
}
}
}
}
+bool
+brw_vs_prog_data_compare(const void *in_a, const void *in_b,
+ int aux_size, const void *in_key)
+{
+ const struct brw_vs_prog_data *a = in_a;
+ const struct brw_vs_prog_data *b = in_b;
+
+ /* Compare all the struct up to the pointers. */
+ if (memcmp(a, b, offsetof(struct brw_vs_prog_data, param)))
+ return false;
+
+ if (memcmp(a->param, b->param, a->nr_params * sizeof(void *)))
+ return false;
+
+ if (memcmp(a->pull_param, b->pull_param, a->nr_pull_params * sizeof(void *)))
+ return false;
+
+ return true;
+}
static bool
do_vs_prog(struct brw_context *brw,
struct brw_vertex_program *vp,
struct brw_vs_prog_key *key)
{
- struct gl_context *ctx = &brw->intel.ctx;
struct intel_context *intel = &brw->intel;
GLuint program_size;
const GLuint *program;
struct brw_vs_compile c;
void *mem_ctx;
- int aux_size;
int i;
+ struct gl_shader *vs = NULL;
+
+ if (prog)
+ vs = prog->_LinkedShaders[MESA_SHADER_VERTEX];
memset(&c, 0, sizeof(c));
memcpy(&c.key, key, sizeof(*key));
mem_ctx = ralloc_context(NULL);
- brw_init_compile(brw, &c.func, mem_ctx);
c.vp = vp;
+ /* Allocate the references to the uniforms that will end up in the
+ * prog_data associated with the compiled program, and which will be freed
+ * by the state cache.
+ */
+ int param_count;
+ if (vs) {
+ /* We add padding around uniform values below vec4 size, with the worst
+ * case being a float value that gets blown up to a vec4, so be
+ * conservative here.
+ */
+ param_count = vs->num_uniform_components * 4;
+
+ } else {
+ param_count = vp->program.Base.Parameters->NumParameters * 4;
+ }
+ /* We also upload clip plane data as uniforms */
+ param_count += MAX_CLIP_PLANES * 4;
+
+ c.prog_data.param = rzalloc_array(NULL, const float *, param_count);
+ c.prog_data.pull_param = rzalloc_array(NULL, const float *, param_count);
+
c.prog_data.outputs_written = vp->program.Base.OutputsWritten;
c.prog_data.inputs_read = vp->program.Base.InputsRead;
if (c.key.copy_edgeflag) {
- c.prog_data.outputs_written |= BITFIELD64_BIT(VERT_RESULT_EDGE);
- c.prog_data.inputs_read |= 1<<VERT_ATTRIB_EDGEFLAG;
+ c.prog_data.outputs_written |= BITFIELD64_BIT(VARYING_SLOT_EDGE);
+ c.prog_data.inputs_read |= VERT_BIT_EDGEFLAG;
}
- /* Put dummy slots into the VUE for the SF to put the replaced
- * point sprite coords in. We shouldn't need these dummy slots,
- * which take up precious URB space, but it would mean that the SF
- * doesn't get nice aligned pairs of input coords into output
- * coords, which would be a pain to handle.
- */
- for (i = 0; i < 8; i++) {
- if (c.key.point_coord_replace & (1 << i))
- c.prog_data.outputs_written |= BITFIELD64_BIT(VERT_RESULT_TEX0 + i);
+ if (intel->gen < 6) {
+ /* Put dummy slots into the VUE for the SF to put the replaced
+ * point sprite coords in. We shouldn't need these dummy slots,
+ * which take up precious URB space, but it would mean that the SF
+ * doesn't get nice aligned pairs of input coords into output
+ * coords, which would be a pain to handle.
+ */
+ for (i = 0; i < 8; i++) {
+ if (c.key.point_coord_replace & (1 << i))
+ c.prog_data.outputs_written |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + i);
+ }
}
+ brw_compute_vue_map(brw, &c);
+
if (0) {
_mesa_fprint_program_opt(stdout, &c.vp->program.Base, PROG_PRINT_DEBUG,
true);
/* Emit GEN4 code.
*/
- if (brw->new_vs_backend && prog) {
- if (!brw_vs_emit(prog, &c)) {
- ralloc_free(mem_ctx);
- return false;
- }
- } else {
- brw_old_vs_emit(&c);
+ program = brw_vs_emit(brw, prog, &c, mem_ctx, &program_size);
+ if (program == NULL) {
+ ralloc_free(mem_ctx);
+ return false;
+ }
+
+ if (c.prog_data.nr_pull_params)
+ c.prog_data.num_surfaces = 1;
+ if (c.vp->program.Base.SamplersUsed)
+ c.prog_data.num_surfaces = SURF_INDEX_VS_TEXTURE(BRW_MAX_TEX_UNIT);
+ if (prog &&
+ prog->_LinkedShaders[MESA_SHADER_VERTEX]->NumUniformBlocks) {
+ c.prog_data.num_surfaces =
+ SURF_INDEX_VS_UBO(prog->_LinkedShaders[MESA_SHADER_VERTEX]->NumUniformBlocks);
}
/* Scratch space is used for register spilling */
if (c.last_scratch) {
- c.prog_data.total_scratch = brw_get_scratch_size(c.last_scratch);
+ perf_debug("Vertex shader triggered register spilling. "
+ "Try reducing the number of live vec4 values to "
+ "improve performance.\n");
+
+ c.prog_data.total_scratch = brw_get_scratch_size(c.last_scratch*REG_SIZE);
brw_get_scratch_bo(intel, &brw->vs.scratch_bo,
c.prog_data.total_scratch * brw->max_vs_threads);
}
- /* get the program
- */
- program = brw_get_program(&c.func, &program_size);
-
- /* We upload from &c.prog_data including the constant_map assuming
- * they're packed together. It would be nice to have a
- * compile-time assert macro here.
- */
- assert(c.constant_map == (int8_t *)&c.prog_data +
- sizeof(c.prog_data));
- assert(ctx->Const.VertexProgram.MaxNativeParameters ==
- ARRAY_SIZE(c.constant_map));
- (void) ctx;
-
- aux_size = sizeof(c.prog_data);
- /* constant_map */
- aux_size += c.vp->program.Base.Parameters->NumParameters;
-
brw_upload_cache(&brw->cache, BRW_VS_PROG,
&c.key, sizeof(c.key),
program, program_size,
- &c.prog_data, aux_size,
+ &c.prog_data, sizeof(c.prog_data),
&brw->vs.prog_offset, &brw->vs.prog_data);
ralloc_free(mem_ctx);
return true;
}
+static bool
+key_debug(struct intel_context *intel, const char *name, int a, int b)
+{
+ if (a != b) {
+ perf_debug(" %s %d->%d\n", name, a, b);
+ return true;
+ }
+ return false;
+}
+
+void
+brw_vs_debug_recompile(struct brw_context *brw,
+ struct gl_shader_program *prog,
+ const struct brw_vs_prog_key *key)
+{
+ struct intel_context *intel = &brw->intel;
+ struct brw_cache_item *c = NULL;
+ const struct brw_vs_prog_key *old_key = NULL;
+ bool found = false;
+
+ perf_debug("Recompiling vertex shader for program %d\n", prog->Name);
+
+ for (unsigned int i = 0; i < brw->cache.size; i++) {
+ for (c = brw->cache.items[i]; c; c = c->next) {
+ if (c->cache_id == BRW_VS_PROG) {
+ old_key = c->key;
+
+ if (old_key->program_string_id == key->program_string_id)
+ break;
+ }
+ }
+ if (c)
+ break;
+ }
+
+ if (!c) {
+ perf_debug(" Didn't find previous compile in the shader cache for "
+ "debug\n");
+ return;
+ }
+
+ for (unsigned int i = 0; i < VERT_ATTRIB_MAX; i++) {
+ found |= key_debug(intel, "Vertex attrib w/a flags",
+ old_key->gl_attrib_wa_flags[i],
+ key->gl_attrib_wa_flags[i]);
+ }
+
+ found |= key_debug(intel, "user clip flags",
+ old_key->userclip_active, key->userclip_active);
+
+ found |= key_debug(intel, "user clipping planes as push constants",
+ old_key->nr_userclip_plane_consts,
+ key->nr_userclip_plane_consts);
+
+ found |= key_debug(intel, "clip distance enable",
+ old_key->uses_clip_distance, key->uses_clip_distance);
+ found |= key_debug(intel, "clip plane enable bitfield",
+ old_key->userclip_planes_enabled_gen_4_5,
+ key->userclip_planes_enabled_gen_4_5);
+ found |= key_debug(intel, "copy edgeflag",
+ old_key->copy_edgeflag, key->copy_edgeflag);
+ found |= key_debug(intel, "PointCoord replace",
+ old_key->point_coord_replace, key->point_coord_replace);
+ found |= key_debug(intel, "vertex color clamping",
+ old_key->clamp_vertex_color, key->clamp_vertex_color);
+
+ found |= brw_debug_recompile_sampler_key(intel, &old_key->tex, &key->tex);
+
+ if (!found) {
+ perf_debug(" Something else\n");
+ }
+}
static void brw_upload_vs_prog(struct brw_context *brw)
{
struct intel_context *intel = &brw->intel;
struct gl_context *ctx = &intel->ctx;
struct brw_vs_prog_key key;
+ /* BRW_NEW_VERTEX_PROGRAM */
struct brw_vertex_program *vp =
(struct brw_vertex_program *)brw->vertex_program;
+ struct gl_program *prog = (struct gl_program *) brw->vertex_program;
int i;
memset(&key, 0, sizeof(key));
= _mesa_logbase2(ctx->Transform.ClipPlanesEnabled) + 1;
}
}
- key.copy_edgeflag = (ctx->Polygon.FrontMode != GL_FILL ||
- ctx->Polygon.BackMode != GL_FILL);
+
+ /* _NEW_POLYGON */
+ if (intel->gen < 6) {
+ key.copy_edgeflag = (ctx->Polygon.FrontMode != GL_FILL ||
+ ctx->Polygon.BackMode != GL_FILL);
+ }
/* _NEW_LIGHT | _NEW_BUFFERS */
key.clamp_vertex_color = ctx->Light._ClampVertexColor;
/* _NEW_POINT */
- if (ctx->Point.PointSprite) {
+ if (intel->gen < 6 && ctx->Point.PointSprite) {
for (i = 0; i < 8; i++) {
if (ctx->Point.CoordReplace[i])
key.point_coord_replace |= (1 << i);
}
}
+ /* _NEW_TEXTURE */
+ brw_populate_sampler_prog_key_data(ctx, prog, &key.tex);
+
/* BRW_NEW_VERTICES */
- for (i = 0; i < VERT_ATTRIB_MAX; i++) {
- if (vp->program.Base.InputsRead & (1 << i) &&
- brw->vb.inputs[i].glarray->Type == GL_FIXED) {
- key.gl_fixed_input_size[i] = brw->vb.inputs[i].glarray->Size;
+ if (intel->gen < 8 && !intel->is_haswell) {
+ /* Prior to Haswell, the hardware can't natively support GL_FIXED or
+ * 2_10_10_10_REV vertex formats. Set appropriate workaround flags.
+ */
+ for (i = 0; i < VERT_ATTRIB_MAX; i++) {
+ if (!(vp->program.Base.InputsRead & BITFIELD64_BIT(i)))
+ continue;
+
+ uint8_t wa_flags = 0;
+
+ switch (brw->vb.inputs[i].glarray->Type) {
+
+ case GL_FIXED:
+ wa_flags = brw->vb.inputs[i].glarray->Size;
+ break;
+
+ case GL_INT_2_10_10_10_REV:
+ wa_flags |= BRW_ATTRIB_WA_SIGN;
+ /* fallthough */
+
+ case GL_UNSIGNED_INT_2_10_10_10_REV:
+ if (brw->vb.inputs[i].glarray->Format == GL_BGRA)
+ wa_flags |= BRW_ATTRIB_WA_BGRA;
+
+ if (brw->vb.inputs[i].glarray->Normalized)
+ wa_flags |= BRW_ATTRIB_WA_NORMALIZE;
+ else if (!brw->vb.inputs[i].glarray->Integer)
+ wa_flags |= BRW_ATTRIB_WA_SCALE;
+
+ break;
+ }
+
+ key.gl_attrib_wa_flags[i] = wa_flags;
}
}
assert(success);
}
- brw->vs.constant_map = ((int8_t *)brw->vs.prog_data +
- sizeof(*brw->vs.prog_data));
}
/* See brw_vs.c:
const struct brw_tracked_state brw_vs_prog = {
.dirty = {
.mesa = (_NEW_TRANSFORM | _NEW_POLYGON | _NEW_POINT | _NEW_LIGHT |
+ _NEW_TEXTURE |
_NEW_BUFFERS),
.brw = (BRW_NEW_VERTEX_PROGRAM |
BRW_NEW_VERTICES),
.cache = 0
},
- .prepare = brw_upload_vs_prog
+ .emit = brw_upload_vs_prog
};
bool
key.program_string_id = bvp->id;
key.clamp_vertex_color = true;
+ for (int i = 0; i < MAX_SAMPLERS; i++) {
+ if (vp->Base.ShadowSamplers & (1 << i)) {
+ /* Assume DEPTH_TEXTURE_MODE is the default: X, X, X, 1 */
+ key.tex.swizzles[i] =
+ MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_ONE);
+ } else {
+ /* Color sampler: assume no swizzling. */
+ key.tex.swizzles[i] = SWIZZLE_XYZW;
+ }
+ }
+
success = do_vs_prog(brw, prog, bvp, &key);
brw->vs.prog_offset = old_prog_offset;
return success;
}
+
+void
+brw_vs_prog_data_free(const void *in_prog_data)
+{
+ const struct brw_vs_prog_data *prog_data = in_prog_data;
+
+ ralloc_free((void *)prog_data->param);
+ ralloc_free((void *)prog_data->pull_param);
+}
projects / mesa.git / blobdiff