i965/vec4: Init mlen for several send from GRF instructions.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_vs.c
index a4f2ac63a0fbf072b7e126e296dd6a52cf096e3e..2d56b749ea3caba8ac97e14caed1dc77709eae09 100644 (file)
@@ -38,7 +38,7 @@
 #include "program/prog_print.h"
 #include "program/prog_parameter.h"
 
-#include "glsl/ralloc.h"
+#include "util/ralloc.h"
 
 static inline void assign_vue_slot(struct brw_vue_map *vue_map,
                                    int varying)
@@ -61,7 +61,7 @@ brw_compute_vue_map(struct brw_context *brw, struct brw_vue_map *vue_map,
    int i;
 
    /* gl_Layer and gl_ViewportIndex don't get their own varying slots -- they
-    * are stored in the virst VUE slot (VARYING_SLOT_PSIZ).
+    * are stored in the first VUE slot (VARYING_SLOT_PSIZ).
     */
    slots_valid &= ~(VARYING_BIT_LAYER | VARYING_BIT_VIEWPORT);
 
@@ -82,9 +82,7 @@ brw_compute_vue_map(struct brw_context *brw, struct brw_vue_map *vue_map,
    /* VUE header: format depends on chip generation and whether clipping is
     * enabled.
     */
-   switch (brw->gen) {
-   case 4:
-   case 5:
+   if (brw->gen < 6) {
       /* There are 8 dwords in VUE header pre-Ironlake:
        * dword 0-3 is indices, point width, clip flags.
        * dword 4-7 is ndc position
@@ -96,10 +94,7 @@ brw_compute_vue_map(struct brw_context *brw, struct brw_vue_map *vue_map,
       assign_vue_slot(vue_map, VARYING_SLOT_PSIZ);
       assign_vue_slot(vue_map, BRW_VARYING_SLOT_NDC);
       assign_vue_slot(vue_map, VARYING_SLOT_POS);
-      break;
-   case 6:
-   case 7:
-   case 8:
+   } else {
       /* There are 8 or 16 DWs (D0-D15) in VUE header on Sandybridge:
        * dword 0-3 of the header is indices, point width, clip flags.
        * dword 4-7 is the 4D space position
@@ -126,10 +121,6 @@ brw_compute_vue_map(struct brw_context *brw, struct brw_vue_map *vue_map,
          assign_vue_slot(vue_map, VARYING_SLOT_COL1);
       if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_BFC1))
          assign_vue_slot(vue_map, VARYING_SLOT_BFC1);
-      break;
-   default:
-      assert (!"VUE map not known for this chip generation");
-      break;
    }
 
    /* The hardware doesn't care about the rest of the vertex outputs, so just
@@ -156,7 +147,7 @@ brw_compute_vue_map(struct brw_context *brw, struct brw_vue_map *vue_map,
  */
 gl_clip_plane *brw_select_clip_planes(struct gl_context *ctx)
 {
-   if (ctx->Shader.CurrentProgram[MESA_SHADER_VERTEX]) {
+   if (ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX]) {
       /* There is currently a GLSL vertex shader, so clip according to GLSL
        * rules, which means compare gl_ClipVertex (or gl_Position, if
        * gl_ClipVertex wasn't assigned) against the eye-coordinate clip planes
@@ -182,12 +173,12 @@ brw_vs_prog_data_compare(const void *in_a, const void *in_b)
    const struct brw_vs_prog_data *a = in_a;
    const struct brw_vs_prog_data *b = in_b;
 
-   /* Compare the base vec4 structure. */
-   if (!brw_vec4_prog_data_compare(&a->base, &b->base))
+   /* Compare the base structure. */
+   if (!brw_stage_prog_data_compare(&a->base.base, &b->base.base))
       return false;
 
    /* Compare the rest of the struct. */
-   const unsigned offset = sizeof(struct brw_vec4_prog_data);
+   const unsigned offset = sizeof(struct brw_stage_prog_data);
    if (memcmp(((char *) a) + offset, ((char *) b) + offset,
               sizeof(struct brw_vs_prog_data) - offset)) {
       return false;
@@ -206,6 +197,7 @@ do_vs_prog(struct brw_context *brw,
    const GLuint *program;
    struct brw_vs_compile c;
    struct brw_vs_prog_data prog_data;
+   struct brw_stage_prog_data *stage_prog_data = &prog_data.base.base;
    void *mem_ctx;
    int i;
    struct gl_shader *vs = NULL;
@@ -217,6 +209,10 @@ do_vs_prog(struct brw_context *brw,
    memcpy(&c.key, key, sizeof(*key));
    memset(&prog_data, 0, sizeof(prog_data));
 
+   /* Use ALT floating point mode for ARB programs so that 0^0 == 1. */
+   if (!prog)
+      stage_prog_data->use_alt_mode = true;
+
    mem_ctx = ralloc_context(NULL);
 
    c.vp = vp;
@@ -241,8 +237,19 @@ do_vs_prog(struct brw_context *brw,
     */
    param_count += c.key.base.nr_userclip_plane_consts * 4;
 
-   prog_data.base.param = rzalloc_array(NULL, const float *, param_count);
-   prog_data.base.pull_param = rzalloc_array(NULL, const float *, param_count);
+   stage_prog_data->param =
+      rzalloc_array(NULL, const gl_constant_value *, param_count);
+   stage_prog_data->pull_param =
+      rzalloc_array(NULL, const gl_constant_value *, param_count);
+
+   /* Setting nr_params here NOT to the size of the param and pull_param
+    * arrays, but to the number of uniform components vec4_visitor
+    * needs. vec4_visitor::setup_uniforms() will set it back to a proper value.
+    */
+   stage_prog_data->nr_params = ALIGN(param_count, 4) / 4;
+   if (vs) {
+      stage_prog_data->nr_params += vs->num_samplers;
+   }
 
    GLbitfield64 outputs_written = vp->program.Base.OutputsWritten;
    prog_data.inputs_read = vp->program.Base.InputsRead;
@@ -283,7 +290,7 @@ do_vs_prog(struct brw_context *brw,
    brw_compute_vue_map(brw, &prog_data.base.vue_map, outputs_written);
 
    if (0) {
-      _mesa_fprint_program_opt(stdout, &c.vp->program.Base, PROG_PRINT_DEBUG,
+      _mesa_fprint_program_opt(stderr, &c.vp->program.Base, PROG_PRINT_DEBUG,
                               true);
    }
 
@@ -301,14 +308,15 @@ do_vs_prog(struct brw_context *brw,
                  "Try reducing the number of live vec4 values to "
                  "improve performance.\n");
 
-      prog_data.base.total_scratch
+      prog_data.base.base.total_scratch
          = brw_get_scratch_size(c.base.last_scratch*REG_SIZE);
 
       brw_get_scratch_bo(brw, &brw->vs.base.scratch_bo,
-                        prog_data.base.total_scratch * brw->max_vs_threads);
+                        prog_data.base.base.total_scratch *
+                         brw->max_vs_threads);
    }
 
-   brw_upload_cache(&brw->cache, BRW_VS_PROG,
+   brw_upload_cache(&brw->cache, BRW_CACHE_VS_PROG,
                    &c.key, sizeof(c.key),
                    program, program_size,
                    &prog_data, sizeof(prog_data),
@@ -341,7 +349,7 @@ brw_vs_debug_recompile(struct brw_context *brw,
 
    for (unsigned int i = 0; i < brw->cache.size; i++) {
       for (c = brw->cache.items[i]; c; c = c->next) {
-         if (c->cache_id == BRW_VS_PROG) {
+         if (c->cache_id == BRW_CACHE_VS_PROG) {
             old_key = c->key;
 
             if (old_key->base.program_string_id == key->base.program_string_id)
@@ -376,7 +384,7 @@ brw_vs_debug_recompile(struct brw_context *brw,
    found |= key_debug(brw, "PointCoord replace",
                       old_key->point_coord_replace, key->point_coord_replace);
    found |= key_debug(brw, "vertex color clamping",
-                      old_key->base.clamp_vertex_color, key->base.clamp_vertex_color);
+                      old_key->clamp_vertex_color, key->clamp_vertex_color);
 
    found |= brw_debug_recompile_sampler_key(brw, &old_key->base.tex,
                                             &key->base.tex);
@@ -388,9 +396,9 @@ brw_vs_debug_recompile(struct brw_context *brw,
 
 
 void
-brw_setup_vec4_key_clip_info(struct brw_context *brw,
-                             struct brw_vec4_prog_key *key,
-                             bool program_uses_clip_distance)
+brw_setup_vue_key_clip_info(struct brw_context *brw,
+                            struct brw_vue_prog_key *key,
+                            bool program_uses_clip_distance)
 {
    struct gl_context *ctx = &brw->ctx;
 
@@ -418,8 +426,8 @@ static void brw_upload_vs_prog(struct brw_context *brw)
     * the inputs it asks for, whether they are varying or not.
     */
    key.base.program_string_id = vp->id;
-   brw_setup_vec4_key_clip_info(brw, &key.base,
-                                vp->program.Base.UsesClipDistanceOut);
+   brw_setup_vue_key_clip_info(brw, &key.base,
+                               vp->program.Base.UsesClipDistanceOut);
 
    /* _NEW_POLYGON */
    if (brw->gen < 6) {
@@ -427,8 +435,11 @@ static void brw_upload_vs_prog(struct brw_context *brw)
                            ctx->Polygon.BackMode != GL_FILL);
    }
 
-   /* _NEW_LIGHT | _NEW_BUFFERS */
-   key.base.clamp_vertex_color = ctx->Light._ClampVertexColor;
+   if (prog->OutputsWritten & (VARYING_BIT_COL0 | VARYING_BIT_COL1 |
+                               VARYING_BIT_BFC0 | VARYING_BIT_BFC1)) {
+      /* _NEW_LIGHT | _NEW_BUFFERS */
+      key.clamp_vertex_color = ctx->Light._ClampVertexColor;
+   }
 
    /* _NEW_POINT */
    if (brw->gen < 6 && ctx->Point.PointSprite) {
@@ -442,48 +453,15 @@ static void brw_upload_vs_prog(struct brw_context *brw)
    brw_populate_sampler_prog_key_data(ctx, prog, brw->vs.base.sampler_count,
                                       &key.base.tex);
 
-   /* BRW_NEW_VERTICES */
-   if (brw->gen < 8 && !brw->is_haswell) {
-      /* Prior to Haswell, the hardware can't natively support GL_FIXED or
-       * 2_10_10_10_REV vertex formats.  Set appropriate workaround flags.
-       */
-      for (i = 0; i < VERT_ATTRIB_MAX; i++) {
-         if (!(vp->program.Base.InputsRead & BITFIELD64_BIT(i)))
-            continue;
-
-         uint8_t wa_flags = 0;
-
-         switch (brw->vb.inputs[i].glarray->Type) {
-
-         case GL_FIXED:
-            wa_flags = brw->vb.inputs[i].glarray->Size;
-            break;
-
-         case GL_INT_2_10_10_10_REV:
-            wa_flags |= BRW_ATTRIB_WA_SIGN;
-            /* fallthough */
-
-         case GL_UNSIGNED_INT_2_10_10_10_REV:
-            if (brw->vb.inputs[i].glarray->Format == GL_BGRA)
-               wa_flags |= BRW_ATTRIB_WA_BGRA;
+   /* BRW_NEW_VS_ATTRIB_WORKAROUNDS */
+   memcpy(key.gl_attrib_wa_flags, brw->vb.attrib_wa_flags,
+          sizeof(brw->vb.attrib_wa_flags));
 
-            if (brw->vb.inputs[i].glarray->Normalized)
-               wa_flags |= BRW_ATTRIB_WA_NORMALIZE;
-            else if (!brw->vb.inputs[i].glarray->Integer)
-               wa_flags |= BRW_ATTRIB_WA_SCALE;
-
-            break;
-         }
-
-         key.gl_attrib_wa_flags[i] = wa_flags;
-      }
-   }
-
-   if (!brw_search_cache(&brw->cache, BRW_VS_PROG,
+   if (!brw_search_cache(&brw->cache, BRW_CACHE_VS_PROG,
                         &key, sizeof(key),
                         &brw->vs.base.prog_offset, &brw->vs.prog_data)) {
       bool success =
-         do_vs_prog(brw, ctx->Shader.CurrentProgram[MESA_SHADER_VERTEX], vp,
+         do_vs_prog(brw, ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX], vp,
                     &key);
       (void) success;
       assert(success);
@@ -494,7 +472,7 @@ static void brw_upload_vs_prog(struct brw_context *brw)
               sizeof(brw->vue_map_geom_out)) != 0) {
       brw->vue_map_vs = brw->vs.prog_data->base.vue_map;
       brw->state.dirty.brw |= BRW_NEW_VUE_MAP_VS;
-      if (brw->gen < 7) {
+      if (brw->gen < 6) {
          /* No geometry shader support, so the VS VUE map is the VUE map for
           * the output of the "geometry" portion of the pipeline.
           */
@@ -508,18 +486,22 @@ static void brw_upload_vs_prog(struct brw_context *brw)
  */
 const struct brw_tracked_state brw_vs_prog = {
    .dirty = {
-      .mesa  = (_NEW_TRANSFORM | _NEW_POLYGON | _NEW_POINT | _NEW_LIGHT |
-               _NEW_TEXTURE |
-               _NEW_BUFFERS),
-      .brw   = (BRW_NEW_VERTEX_PROGRAM |
-               BRW_NEW_VERTICES),
-      .cache = 0
+      .mesa  = _NEW_BUFFERS |
+               _NEW_LIGHT |
+               _NEW_POINT |
+               _NEW_POLYGON |
+               _NEW_TEXTURE |
+               _NEW_TRANSFORM,
+      .brw   = BRW_NEW_VERTEX_PROGRAM |
+               BRW_NEW_VS_ATTRIB_WORKAROUNDS,
    },
    .emit = brw_upload_vs_prog
 };
 
 bool
-brw_vs_precompile(struct gl_context *ctx, struct gl_shader_program *prog)
+brw_vs_precompile(struct gl_context *ctx,
+                  struct gl_shader_program *shader_prog,
+                  struct gl_program *prog)
 {
    struct brw_context *brw = brw_context(ctx);
    struct brw_vs_prog_key key;
@@ -527,30 +509,20 @@ brw_vs_precompile(struct gl_context *ctx, struct gl_shader_program *prog)
    struct brw_vs_prog_data *old_prog_data = brw->vs.prog_data;
    bool success;
 
-   if (!prog->_LinkedShaders[MESA_SHADER_VERTEX])
-      return true;
-
-   struct gl_vertex_program *vp = (struct gl_vertex_program *)
-      prog->_LinkedShaders[MESA_SHADER_VERTEX]->Program;
+   struct gl_vertex_program *vp = (struct gl_vertex_program *) prog;
    struct brw_vertex_program *bvp = brw_vertex_program(vp);
 
    memset(&key, 0, sizeof(key));
 
-   brw_vec4_setup_prog_key_for_precompile(ctx, &key.base, bvp->id, &vp->Base);
+   brw_vue_setup_prog_key_for_precompile(ctx, &key.base, bvp->id, &vp->Base);
+   key.clamp_vertex_color =
+      (prog->OutputsWritten & (VARYING_BIT_COL0 | VARYING_BIT_COL1 |
+                               VARYING_BIT_BFC0 | VARYING_BIT_BFC1));
 
-   success = do_vs_prog(brw, prog, bvp, &key);
+   success = do_vs_prog(brw, shader_prog, bvp, &key);
 
    brw->vs.base.prog_offset = old_prog_offset;
    brw->vs.prog_data = old_prog_data;
 
    return success;
 }
-
-
-void
-brw_vs_prog_data_free(const void *in_prog_data)
-{
-   const struct brw_vs_prog_data *prog_data = in_prog_data;
-
-   brw_vec4_prog_data_free(&prog_data->base);
-}