i965: Remove the create_raw_surface vtbl hook.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_vs_state.c

diff --git a/src/mesa/drivers/dri/i965/brw_vs_state.c b/src/mesa/drivers/dri/i965/brw_vs_state.c
index 351f7ef8cfa0f7dd50bd2fbfd03119910dc9fa4f..17bdbb99cd2eba3268e3deac1faca8a39c4764aa 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vs_state.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_state.c
@@ -47,7 +47,7 @@ brw_upload_vs_unit(struct brw_context *brw)
                        sizeof(*vs), 32, &stage_state->state_offset);
    memset(vs, 0, sizeof(*vs));
 
-   /* BRW_NEW_PROGRAM_CACHE | CACHE_NEW_VS_PROG */
+   /* BRW_NEW_PROGRAM_CACHE | BRW_NEW_VS_PROG_DATA */
    vs->thread0.grf_reg_count =
       ALIGN(brw->vs.prog_data->base.total_grf, 16) / 16 - 1;
    vs->thread0.kernel_start_pointer =
@@ -57,10 +57,7 @@ brw_upload_vs_unit(struct brw_context *brw)
                        stage_state->prog_offset +
                        (vs->thread0.grf_reg_count << 1)) >> 6;
 
-   /* Use ALT floating point mode for ARB vertex programs, because they
-    * require 0^0 == 1.
-    */
-   if (brw->ctx.Shader.CurrentProgram[MESA_SHADER_VERTEX] == NULL)
+   if (brw->vs.prog_data->base.base.use_alt_mode)
       vs->thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
    else
       vs->thread1.floating_point_mode = BRW_FLOATING_POINT_IEEE_754;
@@ -99,7 +96,7 @@ brw_upload_vs_unit(struct brw_context *brw)
       brw->vs.prog_data->base.base.dispatch_grf_start_reg;
    vs->thread3.urb_entry_read_offset = 0;
 
-   /* BRW_NEW_CURBE_OFFSETS, _NEW_TRANSFORM, BRW_NEW_VERTEX_PROGRAM */
+   /* BRW_NEW_CURBE_OFFSETS */
    vs->thread3.const_urb_entry_read_offset = brw->curbe.vs_start * 2;
 
    /* BRW_NEW_URB_FENCE */
@@ -159,7 +156,7 @@ brw_upload_vs_unit(struct brw_context *brw)
    /* Set the sampler state pointer, and its reloc
     */
    if (stage_state->sampler_count) {
-      /* CACHE_NEW_SAMPLER - reloc */
+      /* BRW_NEW_SAMPLER_STATE_TABLE - reloc */
       vs->vs5.sampler_state_pointer =
          (brw->batch.bo->offset64 + stage_state->sampler_offset) >> 5;
       drm_intel_bo_emit_reloc(brw->batch.bo,
@@ -186,14 +183,13 @@ brw_upload_vs_unit(struct brw_context *brw)
 
 const struct brw_tracked_state brw_vs_unit = {
    .dirty = {
-      .mesa  = _NEW_TRANSFORM,
+      .mesa  = 0,
       .brw   = BRW_NEW_BATCH |
                BRW_NEW_CURBE_OFFSETS |
                BRW_NEW_PROGRAM_CACHE |
+               BRW_NEW_SAMPLER_STATE_TABLE |
                BRW_NEW_URB_FENCE |
-               BRW_NEW_VERTEX_PROGRAM,
-      .cache = CACHE_NEW_SAMPLER |
-               CACHE_NEW_VS_PROG,
+               BRW_NEW_VS_PROG_DATA,
    },
    .emit = brw_upload_vs_unit,
 };