i965/gen8: add debug code to show FS disasm with jump locations

[mesa.git] / src / mesa / drivers / dri / i965 / brw_vs_state.c

diff --git a/src/mesa/drivers/dri/i965/brw_vs_state.c b/src/mesa/drivers/dri/i965/brw_vs_state.c
index 015abf1143ce6c6e2f234d91fdf5075d032a683d..e493c3e325eaac198465055f70fc397f2a6bb16f 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vs_state.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_state.c
@@ -1,6 +1,6 @@
 /*
  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
- Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
+ Intel funded Tungsten Graphics to
  develop this 3D driver.
 
  Permission is hereby granted, free of charge, to any person obtaining
@@ -26,7 +26,7 @@
  **********************************************************************/
  /*
   * Authors:
-  *   Keith Whitwell <keith@tungstengraphics.com>
+  *   Keith Whitwell <keithw@vmware.com>
   */
 
 
@@ -60,7 +60,7 @@ brw_upload_vs_unit(struct brw_context *brw)
    /* Use ALT floating point mode for ARB vertex programs, because they
     * require 0^0 == 1.
     */
-   if (brw->ctx.Shader.CurrentVertexProgram == NULL)
+   if (brw->ctx.Shader.CurrentProgram[MESA_SHADER_VERTEX] == NULL)
       vs->thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
    else
       vs->thread1.floating_point_mode = BRW_FLOATING_POINT_IEEE_754;
@@ -84,7 +84,7 @@ brw_upload_vs_unit(struct brw_context *brw)
 
    if (brw->vs.prog_data->base.total_scratch != 0) {
       vs->thread2.scratch_space_base_pointer =
-        stage_state->scratch_bo->offset >> 10; /* reloc */
+        stage_state->scratch_bo->offset64 >> 10; /* reloc */
       vs->thread2.per_thread_scratch_space =
         ffs(brw->vs.prog_data->base.total_scratch) - 11;
    } else {
@@ -161,7 +161,7 @@ brw_upload_vs_unit(struct brw_context *brw)
     */
    if (stage_state->sampler_count) {
       vs->vs5.sampler_state_pointer =
-         (brw->batch.bo->offset + stage_state->sampler_offset) >> 5;
+         (brw->batch.bo->offset64 + stage_state->sampler_offset) >> 5;
       drm_intel_bo_emit_reloc(brw->batch.bo,
                               stage_state->state_offset +
                               offsetof(struct brw_vs_unit_state, vs5),