s/Tungsten Graphics/VMware/
[mesa.git] / src / mesa / drivers / dri / i965 / brw_vs_surface_state.c
index 2c5d06fc41a6bd530c9018ab64f99a6e346053d5..e3fa6386941c41b82d98b2ae74615464db9a4f69 100644 (file)
@@ -1,6 +1,6 @@
 /*
  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
- Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
+ Intel funded Tungsten Graphics to
  develop this 3D driver.
 
  Permission is hereby granted, free of charge, to any person obtaining
@@ -26,7 +26,7 @@
  **********************************************************************/
  /*
   * Authors:
-  *   Keith Whitwell <keith@tungstengraphics.com>
+  *   Keith Whitwell <keithw@vmware.com>
   */
 
 #include "main/mtypes.h"
@@ -44,6 +44,7 @@ brw_upload_vec4_pull_constants(struct brw_context *brw,
                                const struct brw_vec4_prog_data *prog_data)
 {
    int i;
+   uint32_t surf_index = prog_data->base.binding_table.pull_constants_start;
 
    /* Updates the ParamaterValues[i] pointers for all parameters of the
     * basic type of PROGRAM_STATE_VAR.
@@ -54,7 +55,7 @@ brw_upload_vec4_pull_constants(struct brw_context *brw,
       if (stage_state->const_bo) {
         drm_intel_bo_unreference(stage_state->const_bo);
         stage_state->const_bo = NULL;
-        stage_state->surf_offset[SURF_INDEX_VEC4_CONST_BUFFER] = 0;
+        stage_state->surf_offset[surf_index] = 0;
         brw->state.dirty.brw |= brw_new_constbuf;
       }
       return;
@@ -84,9 +85,9 @@ brw_upload_vec4_pull_constants(struct brw_context *brw,
 
    drm_intel_gem_bo_unmap_gtt(stage_state->const_bo);
 
-   const int surf = SURF_INDEX_VEC4_CONST_BUFFER;
-   brw->vtbl.create_constant_surface(brw, stage_state->const_bo, 0, size,
-                                     &stage_state->surf_offset[surf], false);
+   brw_create_constant_surface(brw, stage_state->const_bo, 0, size,
+                               &stage_state->surf_offset[surf_index],
+                               false);
 
    brw->state.dirty.brw |= brw_new_constbuf;
 }
@@ -127,8 +128,6 @@ const struct brw_tracked_state brw_vs_pull_constants = {
 static void
 brw_upload_vs_ubo_surfaces(struct brw_context *brw)
 {
-   struct brw_stage_state *stage_state = &brw->vs.base;
-
    struct gl_context *ctx = &brw->ctx;
    /* _NEW_PROGRAM */
    struct gl_shader_program *prog = ctx->Shader.CurrentVertexProgram;
@@ -136,15 +135,39 @@ brw_upload_vs_ubo_surfaces(struct brw_context *brw)
    if (!prog)
       return;
 
+   /* CACHE_NEW_VS_PROG */
    brw_upload_ubo_surfaces(brw, prog->_LinkedShaders[MESA_SHADER_VERTEX],
-                          &stage_state->surf_offset[SURF_INDEX_VEC4_UBO(0)]);
+                          &brw->vs.base, &brw->vs.prog_data->base.base);
 }
 
 const struct brw_tracked_state brw_vs_ubo_surfaces = {
    .dirty = {
       .mesa = _NEW_PROGRAM,
       .brw = BRW_NEW_BATCH | BRW_NEW_UNIFORM_BUFFER,
-      .cache = 0,
+      .cache = CACHE_NEW_VS_PROG,
    },
    .emit = brw_upload_vs_ubo_surfaces,
 };
+
+static void
+brw_upload_vs_abo_surfaces(struct brw_context *brw)
+{
+   struct gl_context *ctx = &brw->ctx;
+   /* _NEW_PROGRAM */
+   struct gl_shader_program *prog = ctx->Shader.CurrentVertexProgram;
+
+   if (prog) {
+      /* CACHE_NEW_VS_PROG */
+      brw_upload_abo_surfaces(brw, prog, &brw->vs.base,
+                              &brw->vs.prog_data->base.base);
+   }
+}
+
+const struct brw_tracked_state brw_vs_abo_surfaces = {
+   .dirty = {
+      .mesa = _NEW_PROGRAM,
+      .brw = BRW_NEW_BATCH | BRW_NEW_ATOMIC_BUFFER,
+      .cache = CACHE_NEW_VS_PROG,
+   },
+   .emit = brw_upload_vs_abo_surfaces,
+};