#include "main/imports.h"
#include "main/macros.h"
#include "main/colormac.h"
+#include "main/renderbuffer.h"
+#include "main/framebuffer.h"
#include "intel_batchbuffer.h"
#include "intel_regions.h"
+#include "intel_fbo.h"
#include "brw_context.h"
+#include "brw_program.h"
#include "brw_defines.h"
#include "brw_state.h"
#include "brw_draw.h"
#include "brw_vs.h"
#include "brw_wm.h"
+#include "gen6_blorp.h"
+#include "gen7_blorp.h"
+
+#include "glsl/ralloc.h"
+
static void
dri_bo_release(drm_intel_bo **bo)
{
static void brw_destroy_context( struct intel_context *intel )
{
struct brw_context *brw = brw_context(&intel->ctx);
- int i;
- brw_destroy_state(brw);
- brw_draw_destroy( brw );
- brw_clear_validated_bos(brw);
- if (brw->wm.compile_data) {
- free(brw->wm.compile_data->instruction);
- free(brw->wm.compile_data->vreg);
- free(brw->wm.compile_data->refs);
- free(brw->wm.compile_data->prog_instructions);
- free(brw->wm.compile_data);
+ if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
+ /* Force a report. */
+ brw->shader_time.report_time = 0;
+
+ brw_collect_and_report_shader_time(brw);
+ brw_destroy_shader_time(brw);
}
- for (i = 0; i < brw->state.nr_color_regions; i++)
- intel_region_release(&brw->state.color_regions[i]);
- brw->state.nr_color_regions = 0;
- intel_region_release(&brw->state.depth_region);
+ brw_destroy_state(brw);
+ brw_draw_destroy( brw );
dri_bo_release(&brw->curbe.curbe_bo);
- dri_bo_release(&brw->vs.prog_bo);
- dri_bo_release(&brw->vs.state_bo);
- dri_bo_release(&brw->vs.bind_bo);
dri_bo_release(&brw->vs.const_bo);
- dri_bo_release(&brw->gs.prog_bo);
- dri_bo_release(&brw->gs.state_bo);
- dri_bo_release(&brw->clip.prog_bo);
- dri_bo_release(&brw->clip.state_bo);
- dri_bo_release(&brw->clip.vp_bo);
- dri_bo_release(&brw->sf.prog_bo);
- dri_bo_release(&brw->sf.state_bo);
- dri_bo_release(&brw->sf.vp_bo);
- for (i = 0; i < BRW_MAX_TEX_UNIT; i++)
- dri_bo_release(&brw->wm.sdc_bo[i]);
- dri_bo_release(&brw->wm.bind_bo);
- for (i = 0; i < BRW_WM_MAX_SURF; i++)
- dri_bo_release(&brw->wm.surf_bo[i]);
- dri_bo_release(&brw->wm.sampler_bo);
- dri_bo_release(&brw->wm.prog_bo);
- dri_bo_release(&brw->wm.state_bo);
dri_bo_release(&brw->wm.const_bo);
- dri_bo_release(&brw->wm.push_const_bo);
- dri_bo_release(&brw->cc.prog_bo);
- dri_bo_release(&brw->cc.state_bo);
- dri_bo_release(&brw->cc.vp_bo);
- dri_bo_release(&brw->cc.blend_state_bo);
- dri_bo_release(&brw->cc.depth_stencil_state_bo);
- dri_bo_release(&brw->cc.color_calc_state_bo);
free(brw->curbe.last_buf);
free(brw->curbe.next_buf);
-}
+ drm_intel_gem_context_destroy(intel->hw_ctx);
+}
/**
- * called from intelDrawBuffer()
+ * Stub state update function for i915.
+ *
+ * In i915, hardware state updates for drawbuffer changes are driven by
+ * driver-internal calls to GL state update hooks. In i965, we recompute the
+ * apporpriate state at draw time as a result of _NEW_BUFFERS being set, so we
+ * don't need this hook.
*/
-static void brw_set_draw_region( struct intel_context *intel,
- struct intel_region *color_regions[],
- struct intel_region *depth_region,
- GLuint num_color_regions)
+static void
+brw_update_draw_buffer(struct intel_context *intel)
{
- struct brw_context *brw = brw_context(&intel->ctx);
- GLuint i;
-
- /* release old color/depth regions */
- if (brw->state.depth_region != depth_region)
- brw->state.dirty.brw |= BRW_NEW_DEPTH_BUFFER;
- for (i = 0; i < brw->state.nr_color_regions; i++)
- intel_region_release(&brw->state.color_regions[i]);
- intel_region_release(&brw->state.depth_region);
-
- /* reference new color/depth regions */
- for (i = 0; i < num_color_regions; i++)
- intel_region_reference(&brw->state.color_regions[i], color_regions[i]);
- intel_region_reference(&brw->state.depth_region, depth_region);
- brw->state.nr_color_regions = num_color_regions;
}
-
/**
* called from intel_batchbuffer_flush and children before sending a
* batchbuffer off.
+ *
+ * Note that ALL state emitted here must fit in the reserved space
+ * at the end of a batchbuffer. If you add more GPU state, increase
+ * the BATCH_RESERVED macro.
*/
static void brw_finish_batch(struct intel_context *intel)
{
{
struct brw_context *brw = brw_context(&intel->ctx);
- /* Mark all context state as needing to be re-emitted.
- * This is probably not as severe as on 915, since almost all of our state
- * is just in referenced buffers.
+ /* If the kernel supports hardware contexts, then most hardware state is
+ * preserved between batches; we only need to re-emit state that is required
+ * to be in every batch. Otherwise we need to re-emit all the state that
+ * would otherwise be stored in the context (which for all intents and
+ * purposes means everything).
*/
- brw->state.dirty.brw |= BRW_NEW_CONTEXT;
+ if (intel->hw_ctx == NULL)
+ brw->state.dirty.brw |= BRW_NEW_CONTEXT;
- brw->state.dirty.mesa |= ~0;
- brw->state.dirty.brw |= ~0;
- brw->state.dirty.cache |= ~0;
+ brw->state.dirty.brw |= BRW_NEW_BATCH;
- /* Move to the end of the current upload buffer so that we'll force choosing
- * a new buffer next time.
+ /* Assume that the last command before the start of our batch was a
+ * primitive, for safety.
*/
- if (brw->vb.upload.bo != NULL) {
- drm_intel_bo_unreference(brw->vb.upload.bo);
- brw->vb.upload.bo = NULL;
- brw->vb.upload.offset = 0;
- }
+ intel->batch.need_workaround_flush = true;
+
+ brw->state_batch_count = 0;
+
+ brw->ib.type = -1;
+
+ /* Mark that the current program cache BO has been used by the GPU.
+ * It will be reallocated if we need to put new programs in for the
+ * next batch.
+ */
+ brw->cache.bo_used_by_gpu = true;
+
+ /* We need to periodically reap the shader time results, because rollover
+ * happens every few seconds. We also want to see results every once in a
+ * while, because many programs won't cleanly destroy our context, so the
+ * end-of-run printout may not happen.
+ */
+ if (INTEL_DEBUG & DEBUG_SHADER_TIME)
+ brw_collect_and_report_shader_time(brw);
}
static void brw_invalidate_state( struct intel_context *intel, GLuint new_state )
/* nothing */
}
+/**
+ * \see intel_context.vtbl.is_hiz_depth_format
+ */
+static bool brw_is_hiz_depth_format(struct intel_context *intel,
+ gl_format format)
+{
+ if (!intel->has_hiz)
+ return false;
+
+ switch (format) {
+ case MESA_FORMAT_Z32_FLOAT:
+ case MESA_FORMAT_Z32_FLOAT_X24S8:
+ case MESA_FORMAT_X8_Z24:
+ case MESA_FORMAT_S8_Z24:
+ case MESA_FORMAT_Z16:
+ return true;
+ default:
+ return false;
+ }
+}
void brwInitVtbl( struct brw_context *brw )
{
brw->intel.vtbl.new_batch = brw_new_batch;
brw->intel.vtbl.finish_batch = brw_finish_batch;
brw->intel.vtbl.destroy = brw_destroy_context;
- brw->intel.vtbl.set_draw_region = brw_set_draw_region;
+ brw->intel.vtbl.update_draw_buffer = brw_update_draw_buffer;
brw->intel.vtbl.debug_batch = brw_debug_batch;
+ brw->intel.vtbl.annotate_aub = brw_annotate_aub;
+ brw->intel.vtbl.render_target_supported = brw_render_target_supported;
+ brw->intel.vtbl.is_hiz_depth_format = brw_is_hiz_depth_format;
+
+ assert(brw->intel.gen >= 4);
+ if (brw->intel.gen >= 7) {
+ gen7_init_vtable_surface_functions(brw);
+ brw->intel.vtbl.emit_depth_stencil_hiz = gen7_emit_depth_stencil_hiz;
+ } else if (brw->intel.gen >= 4) {
+ gen4_init_vtable_surface_functions(brw);
+ brw->intel.vtbl.emit_depth_stencil_hiz = brw_emit_depth_stencil_hiz;
+ }
}
projects / mesa.git / blobdiff