assert(brw->gen >= 4);
if (brw->gen >= 7) {
gen7_init_vtable_surface_functions(brw);
+ gen7_init_vtable_sampler_functions(brw);
brw->vtbl.emit_depth_stencil_hiz = gen7_emit_depth_stencil_hiz;
} else if (brw->gen >= 4) {
gen4_init_vtable_surface_functions(brw);
+ gen4_init_vtable_sampler_functions(brw);
brw->vtbl.emit_depth_stencil_hiz = brw_emit_depth_stencil_hiz;
}
}