#include "brw_context.h"
#include "brw_wm.h"
#include "brw_state.h"
-#include "brw_shader.h"
#include "main/enums.h"
#include "main/formats.h"
#include "main/fbobject.h"
#include "program/program.h"
#include "intel_mipmap_tree.h"
#include "intel_image.h"
-#include "brw_nir.h"
+#include "compiler/brw_nir.h"
#include "brw_program.h"
#include "util/ralloc.h"
brw_assign_common_binding_table_offsets(devinfo, prog, &prog_data->base,
next_binding_table_offset);
- if (prog->nir->info->outputs_read && !key->coherent_fb_fetch) {
+ if (prog->nir->info.outputs_read && !key->coherent_fb_fetch) {
prog_data->binding_table.render_target_read_start =
next_binding_table_offset;
next_binding_table_offset += key->nr_color_regions;
brw_wm_debug_recompile(struct brw_context *brw, struct gl_program *prog,
const struct brw_wm_prog_key *key)
{
- struct brw_cache_item *c = NULL;
- const struct brw_wm_prog_key *old_key = NULL;
- bool found = false;
-
perf_debug("Recompiling fragment shader for program %d\n", prog->Id);
- for (unsigned int i = 0; i < brw->cache.size; i++) {
- for (c = brw->cache.items[i]; c; c = c->next) {
- if (c->cache_id == BRW_CACHE_FS_PROG) {
- old_key = c->key;
-
- if (old_key->program_string_id == key->program_string_id)
- break;
- }
- }
- if (c)
- break;
- }
+ bool found = false;
+ const struct brw_wm_prog_key *old_key =
+ brw_find_previous_compile(&brw->cache, BRW_CACHE_FS_PROG,
+ key->program_string_id);
- if (!c) {
+ if (!old_key) {
perf_debug(" Didn't find previous compile in the shader cache for debug\n");
return;
}
old_key->alpha_test_func, key->alpha_test_func);
found |= key_debug(brw, "mrt alpha test reference value",
old_key->alpha_test_ref, key->alpha_test_ref);
+ found |= key_debug(brw, "force dual color blending",
+ old_key->force_dual_color_blend,
+ key->force_dual_color_blend);
found |= brw_debug_recompile_sampler_key(brw, &old_key->tex, &key->tex);
if (!fp->program.is_arb_asm) {
brw_nir_setup_glsl_uniforms(fp->program.nir, &fp->program,
&prog_data.base, true);
+ brw_nir_analyze_ubo_ranges(brw->screen->compiler, fp->program.nir,
+ prog_data.base.ubo_ranges);
} else {
brw_nir_setup_arb_uniforms(fp->program.nir, &fp->program,
&prog_data.base);
if (unlikely(brw->perf_debug)) {
start_busy = (brw->batch.last_bo &&
- drm_intel_bo_busy(brw->batch.last_bo));
+ brw_bo_busy(brw->batch.last_bo));
start_time = get_time();
}
program = brw_compile_fs(brw->screen->compiler, brw, mem_ctx,
key, &prog_data, fp->program.nir,
&fp->program, st_index8, st_index16,
- true, brw->use_rep_send, vue_map,
+ true, false, vue_map,
&program_size, &error_str);
if (program == NULL) {
if (!fp->program.is_arb_asm) {
- fp->program.sh.data->LinkStatus = false;
+ fp->program.sh.data->LinkStatus = linking_failure;
ralloc_strcat(&fp->program.sh.data->InfoLog, error_str);
}
brw_wm_debug_recompile(brw, &fp->program, key);
fp->compiled_once = true;
- if (start_busy && !drm_intel_bo_busy(brw->batch.last_bo)) {
+ if (start_busy && !brw_bo_busy(brw->batch.last_bo)) {
perf_debug("FS compile took %.03f ms and stalled the GPU\n",
(get_time() - start_time) * 1000);
}
found |= key_debug(brw, "yx_xuxv image bound",
old_key->yx_xuxv_image_mask,
key->yx_xuxv_image_mask);
+ found |= key_debug(brw, "xy_uxvx image bound",
+ old_key->xy_uxvx_image_mask,
+ key->xy_uxvx_image_mask);
+
for (unsigned int i = 0; i < MAX_SAMPLERS; i++) {
found |= key_debug(brw, "textureGather workarounds",
key->gl_clamp_mask[2] |= 1 << s;
}
- /* gather4's channel select for green from RG32F is broken; requires
- * a shader w/a on IVB; fixable with just SCS on HSW.
- */
- if (brw->gen == 7 && !brw->is_haswell &&
- prog->nir->info->uses_texture_gather) {
- if (img->InternalFormat == GL_RG32F)
- key->gather_channel_quirk_mask |= 1 << s;
+ /* gather4 for RG32* is broken in multiple ways on Gen7. */
+ if (brw->gen == 7 && prog->nir->info.uses_texture_gather) {
+ switch (img->InternalFormat) {
+ case GL_RG32I:
+ case GL_RG32UI: {
+ /* We have to override the format to R32G32_FLOAT_LD.
+ * This means that SCS_ALPHA and SCS_ONE will return 0x3f8
+ * (1.0) rather than integer 1. This needs shader hacks.
+ *
+ * On Ivybridge, we whack W (alpha) to ONE in our key's
+ * swizzle. On Haswell, we look at the original texture
+ * swizzle, and use XYZW with channels overridden to ONE,
+ * leaving normal texture swizzling to SCS.
+ */
+ unsigned src_swizzle =
+ brw->is_haswell ? t->_Swizzle : key->swizzles[s];
+ for (int i = 0; i < 4; i++) {
+ unsigned src_comp = GET_SWZ(src_swizzle, i);
+ if (src_comp == SWIZZLE_ONE || src_comp == SWIZZLE_W) {
+ key->swizzles[i] &= ~(0x7 << (3 * i));
+ key->swizzles[i] |= SWIZZLE_ONE << (3 * i);
+ }
+ }
+ /* fallthrough */
+ }
+ case GL_RG32F:
+ /* The channel select for green doesn't work - we have to
+ * request blue. Haswell can use SCS for this, but Ivybridge
+ * needs a shader workaround.
+ */
+ if (!brw->is_haswell)
+ key->gather_channel_quirk_mask |= 1 << s;
+ break;
+ }
}
/* Gen6's gather4 is broken for UINT/SINT; we treat them as
* UNORM/FLOAT instead and fix it in the shader.
*/
- if (brw->gen == 6 && prog->nir->info->uses_texture_gather) {
+ if (brw->gen == 6 && prog->nir->info.uses_texture_gather) {
key->gen6_gather_wa[s] = gen6_gather_workaround(img->InternalFormat);
}
case __DRI_IMAGE_COMPONENTS_Y_XUXV:
key->yx_xuxv_image_mask |= 1 << s;
break;
+ case __DRI_IMAGE_COMPONENTS_Y_UXVX:
+ key->xy_uxvx_image_mask |= 1 << s;
+ break;
default:
break;
}
if (brw->gen < 6) {
/* _NEW_COLOR */
if (prog->info.fs.uses_discard || ctx->Color.AlphaEnabled) {
- lookup |= IZ_PS_KILL_ALPHATEST_BIT;
+ lookup |= BRW_WM_IZ_PS_KILL_ALPHATEST_BIT;
}
if (prog->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) {
- lookup |= IZ_PS_COMPUTES_DEPTH_BIT;
+ lookup |= BRW_WM_IZ_PS_COMPUTES_DEPTH_BIT;
}
/* _NEW_DEPTH */
if (ctx->Depth.Test)
- lookup |= IZ_DEPTH_TEST_ENABLE_BIT;
+ lookup |= BRW_WM_IZ_DEPTH_TEST_ENABLE_BIT;
if (brw_depth_writes_enabled(brw))
- lookup |= IZ_DEPTH_WRITE_ENABLE_BIT;
+ lookup |= BRW_WM_IZ_DEPTH_WRITE_ENABLE_BIT;
/* _NEW_STENCIL | _NEW_BUFFERS */
- if (ctx->Stencil._Enabled) {
- lookup |= IZ_STENCIL_TEST_ENABLE_BIT;
+ if (brw->stencil_enabled) {
+ lookup |= BRW_WM_IZ_STENCIL_TEST_ENABLE_BIT;
if (ctx->Stencil.WriteMask[0] ||
ctx->Stencil.WriteMask[ctx->Stencil._BackFace])
- lookup |= IZ_STENCIL_WRITE_ENABLE_BIT;
+ lookup |= BRW_WM_IZ_STENCIL_WRITE_ENABLE_BIT;
}
key->iz_lookup = lookup;
}
- line_aa = AA_NEVER;
+ line_aa = BRW_WM_AA_NEVER;
/* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
if (ctx->Line.SmoothFlag) {
if (brw->reduced_primitive == GL_LINES) {
- line_aa = AA_ALWAYS;
+ line_aa = BRW_WM_AA_ALWAYS;
}
else if (brw->reduced_primitive == GL_TRIANGLES) {
if (ctx->Polygon.FrontMode == GL_LINE) {
- line_aa = AA_SOMETIMES;
+ line_aa = BRW_WM_AA_SOMETIMES;
if (ctx->Polygon.BackMode == GL_LINE ||
(ctx->Polygon.CullFlag &&
ctx->Polygon.CullFaceMode == GL_BACK))
- line_aa = AA_ALWAYS;
+ line_aa = BRW_WM_AA_ALWAYS;
}
else if (ctx->Polygon.BackMode == GL_LINE) {
- line_aa = AA_SOMETIMES;
+ line_aa = BRW_WM_AA_SOMETIMES;
if ((ctx->Polygon.CullFlag &&
ctx->Polygon.CullFaceMode == GL_FRONT))
- line_aa = AA_ALWAYS;
+ line_aa = BRW_WM_AA_ALWAYS;
}
}
}
if (brw->gen < 6) {
if (prog->info.fs.uses_discard)
- key.iz_lookup |= IZ_PS_KILL_ALPHATEST_BIT;
+ key.iz_lookup |= BRW_WM_IZ_PS_KILL_ALPHATEST_BIT;
if (outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
- key.iz_lookup |= IZ_PS_COMPUTES_DEPTH_BIT;
+ key.iz_lookup |= BRW_WM_IZ_PS_COMPUTES_DEPTH_BIT;
/* Just assume depth testing. */
- key.iz_lookup |= IZ_DEPTH_TEST_ENABLE_BIT;
- key.iz_lookup |= IZ_DEPTH_WRITE_ENABLE_BIT;
+ key.iz_lookup |= BRW_WM_IZ_DEPTH_TEST_ENABLE_BIT;
+ key.iz_lookup |= BRW_WM_IZ_DEPTH_WRITE_ENABLE_BIT;
}
if (brw->gen < 6 || _mesa_bitcount_64(prog->info.inputs_read &
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