/*
- Copyright (C) Intel Corp. 2006. All Rights Reserved.
- Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
- develop this 3D driver.
-
- Permission is hereby granted, free of charge, to any person obtaining
- a copy of this software and associated documentation files (the
- "Software"), to deal in the Software without restriction, including
- without limitation the rights to use, copy, modify, merge, publish,
- distribute, sublicense, and/or sell copies of the Software, and to
- permit persons to whom the Software is furnished to do so, subject to
- the following conditions:
-
- The above copyright notice and this permission notice (including the
- next paragraph) shall be included in all copies or substantial
- portions of the Software.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
- **********************************************************************/
- /*
- * Authors:
- * Keith Whitwell <keith@tungstengraphics.com>
- */
-
+ * Copyright (C) Intel Corp. 2006. All Rights Reserved.
+ * Intel funded Tungsten Graphics to
+ * develop this 3D driver.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
#include "brw_context.h"
#include "brw_wm.h"
#include "brw_state.h"
+#include "brw_shader.h"
+#include "main/enums.h"
#include "main/formats.h"
+#include "main/fbobject.h"
#include "main/samplerobj.h"
+#include "main/framebuffer.h"
#include "program/prog_parameter.h"
+#include "program/program.h"
+#include "intel_mipmap_tree.h"
+#include "intel_image.h"
+#include "brw_nir.h"
+#include "brw_program.h"
-#include "glsl/ralloc.h"
+#include "util/ralloc.h"
-/** Return number of src args for given instruction */
-GLuint brw_wm_nr_args( GLuint opcode )
+static void
+assign_fs_binding_table_offsets(const struct brw_device_info *devinfo,
+ const struct gl_shader_program *shader_prog,
+ const struct gl_program *prog,
+ const struct brw_wm_prog_key *key,
+ struct brw_wm_prog_data *prog_data)
{
- switch (opcode) {
- case WM_FRONTFACING:
- case WM_PIXELXY:
- return 0;
- case WM_CINTERP:
- case WM_WPOSXY:
- case WM_DELTAXY:
- return 1;
- case WM_LINTERP:
- case WM_PIXELW:
- return 2;
- case WM_FB_WRITE:
- case WM_PINTERP:
- return 3;
- default:
- assert(opcode < MAX_OPCODE);
- return _mesa_num_inst_src_regs(opcode);
- }
-}
+ uint32_t next_binding_table_offset = 0;
-
-GLuint brw_wm_is_scalar_result( GLuint opcode )
-{
- switch (opcode) {
- case OPCODE_COS:
- case OPCODE_EX2:
- case OPCODE_LG2:
- case OPCODE_POW:
- case OPCODE_RCP:
- case OPCODE_RSQ:
- case OPCODE_SIN:
- case OPCODE_DP2:
- case OPCODE_DP3:
- case OPCODE_DP4:
- case OPCODE_DPH:
- case OPCODE_DST:
- return 1;
-
- default:
- return 0;
+ /* If there are no color regions, we still perform an FB write to a null
+ * renderbuffer, which we place at surface index 0.
+ */
+ prog_data->binding_table.render_target_start = next_binding_table_offset;
+ next_binding_table_offset += MAX2(key->nr_color_regions, 1);
+
+ next_binding_table_offset =
+ brw_assign_common_binding_table_offsets(MESA_SHADER_FRAGMENT, devinfo,
+ shader_prog, prog, &prog_data->base,
+ next_binding_table_offset);
+
+ if (prog->nir->info.outputs_read && !key->coherent_fb_fetch) {
+ prog_data->binding_table.render_target_read_start =
+ next_binding_table_offset;
+ next_binding_table_offset += key->nr_color_regions;
}
}
-
/**
- * Do GPU code generation for non-GLSL shader. non-GLSL shaders have
- * no flow control instructions so we can more readily do SSA-style
- * optimizations.
+ * All Mesa program -> GPU code generation goes through this function.
+ * Depending on the instructions used (i.e. flow control instructions)
+ * we'll use one of two code generators.
*/
-static void
-brw_wm_non_glsl_emit(struct brw_context *brw, struct brw_wm_compile *c)
+bool
+brw_codegen_wm_prog(struct brw_context *brw,
+ struct gl_shader_program *prog,
+ struct brw_fragment_program *fp,
+ struct brw_wm_prog_key *key)
{
- /* Augment fragment program. Add instructions for pre- and
- * post-fragment-program tasks such as interpolation and fogging.
- */
- brw_wm_pass_fp(c);
+ struct gl_context *ctx = &brw->ctx;
+ void *mem_ctx = ralloc_context(NULL);
+ struct brw_wm_prog_data prog_data;
+ const GLuint *program;
+ struct brw_shader *fs = NULL;
+ GLuint program_size;
+ bool start_busy = false;
+ double start_time = 0;
- /* Translate to intermediate representation. Build register usage
- * chains.
- */
- brw_wm_pass0(c);
+ if (prog)
+ fs = (struct brw_shader *)prog->_LinkedShaders[MESA_SHADER_FRAGMENT];
- /* Dead code removal.
- */
- brw_wm_pass1(c);
+ memset(&prog_data, 0, sizeof(prog_data));
- /* Register allocation.
- * Divide by two because we operate on 16 pixels at a time and require
- * two GRF entries for each logical shader register.
+ /* Use ALT floating point mode for ARB programs so that 0^0 == 1. */
+ if (!prog)
+ prog_data.base.use_alt_mode = true;
+
+ assign_fs_binding_table_offsets(brw->intelScreen->devinfo, prog,
+ &fp->program.Base, key, &prog_data);
+
+ /* Allocate the references to the uniforms that will end up in the
+ * prog_data associated with the compiled program, and which will be freed
+ * by the state cache.
*/
- c->grf_limit = BRW_WM_MAX_GRF / 2;
+ int param_count = fp->program.Base.nir->num_uniforms / 4;
+ if (fs)
+ prog_data.base.nr_image_params = fs->base.NumImages;
+ /* The backend also sometimes adds params for texture size. */
+ param_count += 2 * ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits;
+ prog_data.base.param =
+ rzalloc_array(NULL, const gl_constant_value *, param_count);
+ prog_data.base.pull_param =
+ rzalloc_array(NULL, const gl_constant_value *, param_count);
+ prog_data.base.image_param =
+ rzalloc_array(NULL, struct brw_image_param,
+ prog_data.base.nr_image_params);
+ prog_data.base.nr_params = param_count;
+
+ if (prog) {
+ brw_nir_setup_glsl_uniforms(fp->program.Base.nir, prog, &fp->program.Base,
+ &prog_data.base, true);
+ } else {
+ brw_nir_setup_arb_uniforms(fp->program.Base.nir, &fp->program.Base,
+ &prog_data.base);
+ }
+
+ if (unlikely(brw->perf_debug)) {
+ start_busy = (brw->batch.last_bo &&
+ drm_intel_bo_busy(brw->batch.last_bo));
+ start_time = get_time();
+ }
- brw_wm_pass2(c);
+ if (unlikely(INTEL_DEBUG & DEBUG_WM))
+ brw_dump_ir("fragment", prog, fs ? &fs->base : NULL, &fp->program.Base);
- /* how many general-purpose registers are used */
- c->prog_data.reg_blocks = brw_register_blocks(c->max_wm_grf);
+ int st_index8 = -1, st_index16 = -1;
+ if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
+ st_index8 = brw_get_shader_time_index(brw, prog, &fp->program.Base, ST_FS8);
+ st_index16 = brw_get_shader_time_index(brw, prog, &fp->program.Base, ST_FS16);
+ }
- /* Emit GEN4 code.
- */
- brw_wm_emit(c);
-}
+ char *error_str = NULL;
+ program = brw_compile_fs(brw->intelScreen->compiler, brw, mem_ctx,
+ key, &prog_data, fp->program.Base.nir,
+ &fp->program.Base, st_index8, st_index16,
+ true, brw->use_rep_send,
+ &program_size, &error_str);
+ if (program == NULL) {
+ if (prog) {
+ prog->LinkStatus = false;
+ ralloc_strcat(&prog->InfoLog, error_str);
+ }
+ _mesa_problem(NULL, "Failed to compile fragment shader: %s\n", error_str);
-/**
- * Return a bitfield where bit n is set if barycentric interpolation mode n
- * (see enum brw_wm_barycentric_interp_mode) is needed by the fragment shader.
- */
-unsigned
-brw_compute_barycentric_interp_modes(bool shade_model_flat,
- const struct gl_fragment_program *fprog)
-{
- unsigned barycentric_interp_modes = 0;
- int attr;
+ ralloc_free(mem_ctx);
+ return false;
+ }
- /* Loop through all fragment shader inputs to figure out what interpolation
- * modes are in use, and set the appropriate bits in
- * barycentric_interp_modes.
- */
- for (attr = 0; attr < FRAG_ATTRIB_MAX; ++attr) {
- enum glsl_interp_qualifier interp_qualifier =
- fprog->InterpQualifier[attr];
- bool is_gl_Color = attr == FRAG_ATTRIB_COL0 || attr == FRAG_ATTRIB_COL1;
-
- /* Ignore unused inputs. */
- if (!(fprog->Base.InputsRead & BITFIELD64_BIT(attr)))
- continue;
-
- /* Ignore WPOS and FACE, because they don't require interpolation. */
- if (attr == FRAG_ATTRIB_WPOS || attr == FRAG_ATTRIB_FACE)
- continue;
-
- if (interp_qualifier == INTERP_QUALIFIER_NOPERSPECTIVE) {
- barycentric_interp_modes |=
- 1 << BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC;
- } else if (interp_qualifier == INTERP_QUALIFIER_SMOOTH ||
- (!(shade_model_flat && is_gl_Color) &&
- interp_qualifier == INTERP_QUALIFIER_NONE)) {
- barycentric_interp_modes |=
- 1 << BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC;
+ if (unlikely(brw->perf_debug) && fs) {
+ if (fs->compiled_once)
+ brw_wm_debug_recompile(brw, prog, key);
+ fs->compiled_once = true;
+
+ if (start_busy && !drm_intel_bo_busy(brw->batch.last_bo)) {
+ perf_debug("FS compile took %.03f ms and stalled the GPU\n",
+ (get_time() - start_time) * 1000);
}
}
- return barycentric_interp_modes;
+ brw_alloc_stage_scratch(brw, &brw->wm.base,
+ prog_data.base.total_scratch,
+ brw->max_wm_threads);
+
+ if (unlikely(INTEL_DEBUG & DEBUG_WM))
+ fprintf(stderr, "\n");
+
+ brw_upload_cache(&brw->cache, BRW_CACHE_FS_PROG,
+ key, sizeof(struct brw_wm_prog_key),
+ program, program_size,
+ &prog_data, sizeof(prog_data),
+ &brw->wm.base.prog_offset, &brw->wm.prog_data);
+
+ ralloc_free(mem_ctx);
+
+ return true;
}
+bool
+brw_debug_recompile_sampler_key(struct brw_context *brw,
+ const struct brw_sampler_prog_key_data *old_key,
+ const struct brw_sampler_prog_key_data *key)
+{
+ bool found = false;
+
+ for (unsigned int i = 0; i < MAX_SAMPLERS; i++) {
+ found |= key_debug(brw, "EXT_texture_swizzle or DEPTH_TEXTURE_MODE",
+ old_key->swizzles[i], key->swizzles[i]);
+ }
+ found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 1st coordinate",
+ old_key->gl_clamp_mask[0], key->gl_clamp_mask[0]);
+ found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 2nd coordinate",
+ old_key->gl_clamp_mask[1], key->gl_clamp_mask[1]);
+ found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 3rd coordinate",
+ old_key->gl_clamp_mask[2], key->gl_clamp_mask[2]);
+ found |= key_debug(brw, "gather channel quirk on any texture unit",
+ old_key->gather_channel_quirk_mask, key->gather_channel_quirk_mask);
+ found |= key_debug(brw, "compressed multisample layout",
+ old_key->compressed_multisample_layout_mask,
+ key->compressed_multisample_layout_mask);
+ found |= key_debug(brw, "16x msaa",
+ old_key->msaa_16,
+ key->msaa_16);
+
+ found |= key_debug(brw, "y_uv image bound",
+ old_key->y_uv_image_mask,
+ key->y_uv_image_mask);
+ found |= key_debug(brw, "y_u_v image bound",
+ old_key->y_u_v_image_mask,
+ key->y_u_v_image_mask);
+ found |= key_debug(brw, "yx_xuxv image bound",
+ old_key->yx_xuxv_image_mask,
+ key->yx_xuxv_image_mask);
+
+ for (unsigned int i = 0; i < MAX_SAMPLERS; i++) {
+ found |= key_debug(brw, "textureGather workarounds",
+ old_key->gen6_gather_wa[i], key->gen6_gather_wa[i]);
+ }
+
+ return found;
+}
void
-brw_wm_payload_setup(struct brw_context *brw,
- struct brw_wm_compile *c)
+brw_wm_debug_recompile(struct brw_context *brw,
+ struct gl_shader_program *prog,
+ const struct brw_wm_prog_key *key)
{
- struct intel_context *intel = &brw->intel;
- bool uses_depth = (c->fp->program.Base.InputsRead &
- (1 << FRAG_ATTRIB_WPOS)) != 0;
- unsigned barycentric_interp_modes =
- brw_compute_barycentric_interp_modes(c->key.flat_shade,
- &c->fp->program);
- int i;
-
- if (intel->gen >= 6) {
- /* R0-1: masks, pixel X/Y coordinates. */
- c->nr_payload_regs = 2;
- /* R2: only for 32-pixel dispatch.*/
-
- /* R3-26: barycentric interpolation coordinates. These appear in the
- * same order that they appear in the brw_wm_barycentric_interp_mode
- * enum. Each set of coordinates occupies 2 registers if dispatch width
- * == 8 and 4 registers if dispatch width == 16. Coordinates only
- * appear if they were enabled using the "Barycentric Interpolation
- * Mode" bits in WM_STATE.
- */
- for (i = 0; i < BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT; ++i) {
- if (barycentric_interp_modes & (1 << i)) {
- c->barycentric_coord_reg[i] = c->nr_payload_regs;
- c->nr_payload_regs += 2;
- if (c->dispatch_width == 16) {
- c->nr_payload_regs += 2;
- }
+ struct brw_cache_item *c = NULL;
+ const struct brw_wm_prog_key *old_key = NULL;
+ bool found = false;
+
+ perf_debug("Recompiling fragment shader for program %d\n", prog->Name);
+
+ for (unsigned int i = 0; i < brw->cache.size; i++) {
+ for (c = brw->cache.items[i]; c; c = c->next) {
+ if (c->cache_id == BRW_CACHE_FS_PROG) {
+ old_key = c->key;
+
+ if (old_key->program_string_id == key->program_string_id)
+ break;
}
}
+ if (c)
+ break;
+ }
- /* R27: interpolated depth if uses source depth */
- if (uses_depth) {
- c->source_depth_reg = c->nr_payload_regs;
- c->nr_payload_regs++;
- if (c->dispatch_width == 16) {
- /* R28: interpolated depth if not 8-wide. */
- c->nr_payload_regs++;
- }
- }
- /* R29: interpolated W set if GEN6_WM_USES_SOURCE_W.
+ if (!c) {
+ perf_debug(" Didn't find previous compile in the shader cache for debug\n");
+ return;
+ }
+
+ found |= key_debug(brw, "alphatest, computed depth, depth test, or "
+ "depth write",
+ old_key->iz_lookup, key->iz_lookup);
+ found |= key_debug(brw, "depth statistics",
+ old_key->stats_wm, key->stats_wm);
+ found |= key_debug(brw, "flat shading",
+ old_key->flat_shade, key->flat_shade);
+ found |= key_debug(brw, "per-sample interpolation",
+ old_key->persample_interp, key->persample_interp);
+ found |= key_debug(brw, "number of color buffers",
+ old_key->nr_color_regions, key->nr_color_regions);
+ found |= key_debug(brw, "MRT alpha test or alpha-to-coverage",
+ old_key->replicate_alpha, key->replicate_alpha);
+ found |= key_debug(brw, "fragment color clamping",
+ old_key->clamp_fragment_color, key->clamp_fragment_color);
+ found |= key_debug(brw, "multisampled FBO",
+ old_key->multisample_fbo, key->multisample_fbo);
+ found |= key_debug(brw, "line smoothing",
+ old_key->line_aa, key->line_aa);
+ found |= key_debug(brw, "input slots valid",
+ old_key->input_slots_valid, key->input_slots_valid);
+ found |= key_debug(brw, "mrt alpha test function",
+ old_key->alpha_test_func, key->alpha_test_func);
+ found |= key_debug(brw, "mrt alpha test reference value",
+ old_key->alpha_test_ref, key->alpha_test_ref);
+
+ found |= brw_debug_recompile_sampler_key(brw, &old_key->tex, &key->tex);
+
+ if (!found) {
+ perf_debug(" Something else\n");
+ }
+}
+
+static uint8_t
+gen6_gather_workaround(GLenum internalformat)
+{
+ switch (internalformat) {
+ case GL_R8I: return WA_SIGN | WA_8BIT;
+ case GL_R8UI: return WA_8BIT;
+ case GL_R16I: return WA_SIGN | WA_16BIT;
+ case GL_R16UI: return WA_16BIT;
+ default:
+ /* Note that even though GL_R32I and GL_R32UI have format overrides in
+ * the surface state, there is no shader w/a required.
*/
- if (uses_depth) {
- c->source_w_reg = c->nr_payload_regs;
- c->nr_payload_regs++;
- if (c->dispatch_width == 16) {
- /* R30: interpolated W if not 8-wide. */
- c->nr_payload_regs++;
- }
- }
- /* R31: MSAA position offsets. */
- /* R32-: bary for 32-pixel. */
- /* R58-59: interp W for 32-pixel. */
-
- if (c->fp->program.Base.OutputsWritten &
- BITFIELD64_BIT(FRAG_RESULT_DEPTH)) {
- c->source_depth_to_render_target = true;
- c->computes_depth = true;
- }
- } else {
- brw_wm_lookup_iz(intel, c);
+ return 0;
}
}
-/**
- * All Mesa program -> GPU code generation goes through this function.
- * Depending on the instructions used (i.e. flow control instructions)
- * we'll use one of two code generators.
- */
-bool do_wm_prog(struct brw_context *brw,
- struct gl_shader_program *prog,
- struct brw_fragment_program *fp,
- struct brw_wm_prog_key *key)
+void
+brw_populate_sampler_prog_key_data(struct gl_context *ctx,
+ const struct gl_program *prog,
+ struct brw_sampler_prog_key_data *key)
{
- struct intel_context *intel = &brw->intel;
- struct brw_wm_compile *c;
- const GLuint *program;
- GLuint program_size;
+ struct brw_context *brw = brw_context(ctx);
+ GLbitfield mask = prog->SamplersUsed;
- c = brw->wm.compile_data;
- if (c == NULL) {
- brw->wm.compile_data = rzalloc(NULL, struct brw_wm_compile);
- c = brw->wm.compile_data;
- if (c == NULL) {
- /* Ouch - big out of memory problem. Can't continue
- * without triggering a segfault, no way to signal,
- * so just return.
- */
- return false;
- }
- } else {
- void *instruction = c->instruction;
- void *prog_instructions = c->prog_instructions;
- void *vreg = c->vreg;
- void *refs = c->refs;
- memset(c, 0, sizeof(*brw->wm.compile_data));
- c->instruction = instruction;
- c->prog_instructions = prog_instructions;
- c->vreg = vreg;
- c->refs = refs;
- }
- memcpy(&c->key, key, sizeof(*key));
+ while (mask) {
+ const int s = u_bit_scan(&mask);
- c->fp = fp;
- c->env_param = brw->intel.ctx.FragmentProgram.Parameters;
+ key->swizzles[s] = SWIZZLE_NOOP;
- brw_init_compile(brw, &c->func, c);
+ int unit_id = prog->SamplerUnits[s];
+ const struct gl_texture_unit *unit = &ctx->Texture.Unit[unit_id];
- if (prog && prog->_LinkedShaders[MESA_SHADER_FRAGMENT]) {
- if (!brw_wm_fs_emit(brw, c, prog))
- return false;
- } else {
- if (!c->instruction) {
- c->instruction = rzalloc_array(c, struct brw_wm_instruction, BRW_WM_MAX_INSN);
- c->prog_instructions = rzalloc_array(c, struct prog_instruction, BRW_WM_MAX_INSN);
- c->vreg = rzalloc_array(c, struct brw_wm_value, BRW_WM_MAX_VREG);
- c->refs = rzalloc_array(c, struct brw_wm_ref, BRW_WM_MAX_REF);
- }
+ if (unit->_Current && unit->_Current->Target != GL_TEXTURE_BUFFER) {
+ const struct gl_texture_object *t = unit->_Current;
+ const struct gl_texture_image *img = t->Image[0][t->BaseLevel];
+ struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit_id);
- /* Fallback for fixed function and ARB_fp shaders. */
- c->dispatch_width = 16;
- brw_wm_payload_setup(brw, c);
- brw_wm_non_glsl_emit(brw, c);
- c->prog_data.dispatch_width = 16;
- }
+ const bool alpha_depth = t->DepthMode == GL_ALPHA &&
+ (img->_BaseFormat == GL_DEPTH_COMPONENT ||
+ img->_BaseFormat == GL_DEPTH_STENCIL);
- /* Scratch space is used for register spilling */
- if (c->last_scratch) {
- c->prog_data.total_scratch = brw_get_scratch_size(c->last_scratch);
+ /* Haswell handles texture swizzling as surface format overrides
+ * (except for GL_ALPHA); all other platforms need MOVs in the shader.
+ */
+ if (alpha_depth || (brw->gen < 8 && !brw->is_haswell))
+ key->swizzles[s] = brw_get_texture_swizzle(ctx, t);
- brw_get_scratch_bo(intel, &brw->wm.scratch_bo,
- c->prog_data.total_scratch * brw->max_wm_threads);
- }
+ if (brw->gen < 8 &&
+ sampler->MinFilter != GL_NEAREST &&
+ sampler->MagFilter != GL_NEAREST) {
+ if (sampler->WrapS == GL_CLAMP)
+ key->gl_clamp_mask[0] |= 1 << s;
+ if (sampler->WrapT == GL_CLAMP)
+ key->gl_clamp_mask[1] |= 1 << s;
+ if (sampler->WrapR == GL_CLAMP)
+ key->gl_clamp_mask[2] |= 1 << s;
+ }
- if (unlikely(INTEL_DEBUG & DEBUG_WM))
- fprintf(stderr, "\n");
+ /* gather4's channel select for green from RG32F is broken; requires
+ * a shader w/a on IVB; fixable with just SCS on HSW.
+ */
+ if (brw->gen == 7 && !brw->is_haswell && prog->UsesGather) {
+ if (img->InternalFormat == GL_RG32F)
+ key->gather_channel_quirk_mask |= 1 << s;
+ }
- /* get the program
- */
- program = brw_get_program(&c->func, &program_size);
+ /* Gen6's gather4 is broken for UINT/SINT; we treat them as
+ * UNORM/FLOAT instead and fix it in the shader.
+ */
+ if (brw->gen == 6 && prog->UsesGather) {
+ key->gen6_gather_wa[s] = gen6_gather_workaround(img->InternalFormat);
+ }
- brw_upload_cache(&brw->cache, BRW_WM_PROG,
- &c->key, sizeof(c->key),
- program, program_size,
- &c->prog_data, sizeof(c->prog_data),
- &brw->wm.prog_offset, &brw->wm.prog_data);
+ /* If this is a multisample sampler, and uses the CMS MSAA layout,
+ * then we need to emit slightly different code to first sample the
+ * MCS surface.
+ */
+ struct intel_texture_object *intel_tex =
+ intel_texture_object((struct gl_texture_object *)t);
- return true;
-}
+ /* From gen9 onwards some single sampled buffers can also be
+ * compressed. These don't need ld2dms sampling along with mcs fetch.
+ */
+ if (brw->gen >= 7 &&
+ intel_tex->mt->msaa_layout == INTEL_MSAA_LAYOUT_CMS &&
+ intel_tex->mt->num_samples > 1) {
+ key->compressed_multisample_layout_mask |= 1 << s;
+
+ if (intel_tex->mt->num_samples >= 16) {
+ assert(brw->gen >= 9);
+ key->msaa_16 |= 1 << s;
+ }
+ }
+
+ if (t->Target == GL_TEXTURE_EXTERNAL_OES && intel_tex->planar_format) {
+ switch (intel_tex->planar_format->components) {
+ case __DRI_IMAGE_COMPONENTS_Y_UV:
+ key->y_uv_image_mask |= 1 << s;
+ break;
+ case __DRI_IMAGE_COMPONENTS_Y_U_V:
+ key->y_u_v_image_mask |= 1 << s;
+ break;
+ case __DRI_IMAGE_COMPONENTS_Y_XUXV:
+ key->yx_xuxv_image_mask |= 1 << s;
+ break;
+ default:
+ break;
+ }
+ }
+ }
+ }
+}
+static bool
+brw_wm_state_dirty(const struct brw_context *brw)
+{
+ return brw_state_dirty(brw,
+ _NEW_BUFFERS |
+ _NEW_COLOR |
+ _NEW_DEPTH |
+ _NEW_FRAG_CLAMP |
+ _NEW_HINT |
+ _NEW_LIGHT |
+ _NEW_LINE |
+ _NEW_MULTISAMPLE |
+ _NEW_POLYGON |
+ _NEW_STENCIL |
+ _NEW_TEXTURE,
+ BRW_NEW_FRAGMENT_PROGRAM |
+ BRW_NEW_REDUCED_PRIMITIVE |
+ BRW_NEW_STATS_WM |
+ BRW_NEW_VUE_MAP_GEOM_OUT);
+}
-static void brw_wm_populate_key( struct brw_context *brw,
- struct brw_wm_prog_key *key )
+static void
+brw_wm_populate_key(struct brw_context *brw, struct brw_wm_prog_key *key)
{
- struct gl_context *ctx = &brw->intel.ctx;
+ struct gl_context *ctx = &brw->ctx;
/* BRW_NEW_FRAGMENT_PROGRAM */
- const struct brw_fragment_program *fp =
- (struct brw_fragment_program *)brw->fragment_program;
+ const struct brw_fragment_program *fp =
+ (struct brw_fragment_program *) brw->fragment_program;
+ const struct gl_program *prog = (struct gl_program *) brw->fragment_program;
GLuint lookup = 0;
GLuint line_aa;
- GLuint i;
memset(key, 0, sizeof(*key));
/* Build the index for table lookup
*/
- /* _NEW_COLOR */
- key->alpha_test = ctx->Color.AlphaEnabled;
- if (fp->program.UsesKill ||
- ctx->Color.AlphaEnabled)
- lookup |= IZ_PS_KILL_ALPHATEST_BIT;
+ if (brw->gen < 6) {
+ /* _NEW_COLOR */
+ if (fp->program.UsesKill || ctx->Color.AlphaEnabled)
+ lookup |= IZ_PS_KILL_ALPHATEST_BIT;
- if (fp->program.Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
- lookup |= IZ_PS_COMPUTES_DEPTH_BIT;
+ if (fp->program.Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
+ lookup |= IZ_PS_COMPUTES_DEPTH_BIT;
- /* _NEW_DEPTH */
- if (ctx->Depth.Test)
- lookup |= IZ_DEPTH_TEST_ENABLE_BIT;
+ /* _NEW_DEPTH */
+ if (ctx->Depth.Test)
+ lookup |= IZ_DEPTH_TEST_ENABLE_BIT;
- if (ctx->Depth.Test &&
- ctx->Depth.Mask) /* ?? */
- lookup |= IZ_DEPTH_WRITE_ENABLE_BIT;
+ if (ctx->Depth.Test && ctx->Depth.Mask) /* ?? */
+ lookup |= IZ_DEPTH_WRITE_ENABLE_BIT;
- /* _NEW_STENCIL */
- if (ctx->Stencil._Enabled) {
- lookup |= IZ_STENCIL_TEST_ENABLE_BIT;
+ /* _NEW_STENCIL | _NEW_BUFFERS */
+ if (ctx->Stencil._Enabled) {
+ lookup |= IZ_STENCIL_TEST_ENABLE_BIT;
- if (ctx->Stencil.WriteMask[0] ||
- ctx->Stencil.WriteMask[ctx->Stencil._BackFace])
- lookup |= IZ_STENCIL_WRITE_ENABLE_BIT;
+ if (ctx->Stencil.WriteMask[0] ||
+ ctx->Stencil.WriteMask[ctx->Stencil._BackFace])
+ lookup |= IZ_STENCIL_WRITE_ENABLE_BIT;
+ }
+ key->iz_lookup = lookup;
}
line_aa = AA_NEVER;
/* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
if (ctx->Line.SmoothFlag) {
- if (brw->intel.reduced_primitive == GL_LINES) {
+ if (brw->reduced_primitive == GL_LINES) {
line_aa = AA_ALWAYS;
}
- else if (brw->intel.reduced_primitive == GL_TRIANGLES) {
+ else if (brw->reduced_primitive == GL_TRIANGLES) {
if (ctx->Polygon.FrontMode == GL_LINE) {
line_aa = AA_SOMETIMES;
}
}
- key->iz_lookup = lookup;
key->line_aa = line_aa;
- key->stats_wm = brw->intel.stats_wm;
- /* BRW_NEW_WM_INPUT_DIMENSIONS */
- key->proj_attrib_mask = brw->wm.input_size_masks[4-1];
+ /* _NEW_HINT */
+ key->high_quality_derivatives =
+ ctx->Hint.FragmentShaderDerivative == GL_NICEST;
+
+ if (brw->gen < 6)
+ key->stats_wm = brw->stats_wm;
/* _NEW_LIGHT */
key->flat_shade = (ctx->Light.ShadeModel == GL_FLAT);
key->clamp_fragment_color = ctx->Color._ClampFragmentColor;
/* _NEW_TEXTURE */
- for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
- const struct gl_texture_unit *unit = &ctx->Texture.Unit[i];
-
- if (unit->_ReallyEnabled) {
- const struct gl_texture_object *t = unit->_Current;
- const struct gl_texture_image *img = t->Image[0][t->BaseLevel];
- struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, i);
- int swizzles[SWIZZLE_NIL + 1] = {
- SWIZZLE_X,
- SWIZZLE_Y,
- SWIZZLE_Z,
- SWIZZLE_W,
- SWIZZLE_ZERO,
- SWIZZLE_ONE,
- SWIZZLE_NIL
- };
-
- /* GL_DEPTH_TEXTURE_MODE is normally handled through
- * brw_wm_surface_state, but it applies to shadow compares as
- * well and our shadow compares always return the result in
- * all 4 channels.
- */
- if (sampler->CompareMode == GL_COMPARE_R_TO_TEXTURE_ARB) {
- key->compare_funcs[i] = sampler->CompareFunc;
-
- if (sampler->DepthMode == GL_ALPHA) {
- swizzles[0] = SWIZZLE_ZERO;
- swizzles[1] = SWIZZLE_ZERO;
- swizzles[2] = SWIZZLE_ZERO;
- } else if (sampler->DepthMode == GL_LUMINANCE) {
- swizzles[3] = SWIZZLE_ONE;
- } else if (sampler->DepthMode == GL_RED) {
- /* See table 3.23 of the GL 3.0 spec. */
- swizzles[1] = SWIZZLE_ZERO;
- swizzles[2] = SWIZZLE_ZERO;
- swizzles[3] = SWIZZLE_ONE;
- }
- }
+ brw_populate_sampler_prog_key_data(ctx, prog, &key->tex);
- if (img->InternalFormat == GL_YCBCR_MESA) {
- key->yuvtex_mask |= 1 << i;
- if (img->TexFormat == MESA_FORMAT_YCBCR)
- key->yuvtex_swap_mask |= 1 << i;
- }
-
- key->tex_swizzles[i] =
- MAKE_SWIZZLE4(swizzles[GET_SWZ(t->_Swizzle, 0)],
- swizzles[GET_SWZ(t->_Swizzle, 1)],
- swizzles[GET_SWZ(t->_Swizzle, 2)],
- swizzles[GET_SWZ(t->_Swizzle, 3)]);
+ /* _NEW_BUFFERS */
+ key->nr_color_regions = ctx->DrawBuffer->_NumColorDrawBuffers;
- if (sampler->MinFilter != GL_NEAREST &&
- sampler->MagFilter != GL_NEAREST) {
- if (sampler->WrapS == GL_CLAMP)
- key->gl_clamp_mask[0] |= 1 << i;
- if (sampler->WrapT == GL_CLAMP)
- key->gl_clamp_mask[1] |= 1 << i;
- if (sampler->WrapR == GL_CLAMP)
- key->gl_clamp_mask[2] |= 1 << i;
- }
- }
- else {
- key->tex_swizzles[i] = SWIZZLE_NOOP;
- }
+ /* _NEW_COLOR */
+ key->force_dual_color_blend = brw->dual_color_blend_by_location &&
+ (ctx->Color.BlendEnabled & 1) && ctx->Color.Blend[0]._UsesDualSrc;
+
+ /* _NEW_MULTISAMPLE, _NEW_COLOR, _NEW_BUFFERS */
+ key->replicate_alpha = ctx->DrawBuffer->_NumColorDrawBuffers > 1 &&
+ (ctx->Multisample.SampleAlphaToCoverage || ctx->Color.AlphaEnabled);
+
+ /* _NEW_BUFFERS _NEW_MULTISAMPLE */
+ /* Ignore sample qualifier while computing this flag. */
+ if (ctx->Multisample.Enabled) {
+ key->persample_interp =
+ ctx->Multisample.SampleShading &&
+ (ctx->Multisample.MinSampleShadingValue *
+ _mesa_geometric_samples(ctx->DrawBuffer) > 1);
+
+ key->multisample_fbo = _mesa_geometric_samples(ctx->DrawBuffer) > 1;
}
- /* _NEW_BUFFERS */
- /*
- * Include the draw buffer origin and height so that we can calculate
- * fragment position values relative to the bottom left of the drawable,
- * from the incoming screen origin relative position we get as part of our
- * payload.
- *
- * This is only needed for the WM_WPOSXY opcode when the fragment program
- * uses the gl_FragCoord input.
- *
- * We could avoid recompiling by including this as a constant referenced by
- * our program, but if we were to do that it would also be nice to handle
- * getting that constant updated at batchbuffer submit time (when we
- * hold the lock and know where the buffer really is) rather than at emit
- * time when we don't hold the lock and are just guessing. We could also
- * just avoid using this as key data if the program doesn't use
- * fragment.position.
- *
- * For DRI2 the origin_x/y will always be (0,0) but we still need the
- * drawable height in order to invert the Y axis.
- */
- if (fp->program.Base.InputsRead & FRAG_BIT_WPOS) {
- key->drawable_height = ctx->DrawBuffer->Height;
- key->render_to_fbo = ctx->DrawBuffer->Name != 0;
- }
+ /* BRW_NEW_VUE_MAP_GEOM_OUT */
+ if (brw->gen < 6 || _mesa_bitcount_64(fp->program.Base.InputsRead &
+ BRW_FS_VARYING_INPUT_MASK) > 16)
+ key->input_slots_valid = brw->vue_map_geom_out.slots_valid;
- /* _NEW_BUFFERS */
- key->nr_color_regions = ctx->DrawBuffer->_NumColorDrawBuffers;
- /* CACHE_NEW_VS_PROG */
- key->vp_outputs_written = brw->vs.prog_data->outputs_written;
+ /* _NEW_COLOR | _NEW_BUFFERS */
+ /* Pre-gen6, the hardware alpha test always used each render
+ * target's alpha to do alpha test, as opposed to render target 0's alpha
+ * like GL requires. Fix that by building the alpha test into the
+ * shader, and we'll skip enabling the fixed function alpha test.
+ */
+ if (brw->gen < 6 && ctx->DrawBuffer->_NumColorDrawBuffers > 1 &&
+ ctx->Color.AlphaEnabled) {
+ key->alpha_test_func = ctx->Color.AlphaFunc;
+ key->alpha_test_ref = ctx->Color.AlphaRef;
+ }
/* The unique fragment program ID */
key->program_string_id = fp->id;
-}
+ /* Whether reads from the framebuffer should behave coherently. */
+ key->coherent_fb_fetch = ctx->Extensions.MESA_shader_framebuffer_fetch;
+}
-static void
+void
brw_upload_wm_prog(struct brw_context *brw)
{
- struct intel_context *intel = &brw->intel;
- struct gl_context *ctx = &intel->ctx;
+ struct gl_context *ctx = &brw->ctx;
+ struct gl_shader_program *current = ctx->_Shader->_CurrentFragmentProgram;
struct brw_wm_prog_key key;
struct brw_fragment_program *fp = (struct brw_fragment_program *)
brw->fragment_program;
+ if (!brw_wm_state_dirty(brw))
+ return;
+
brw_wm_populate_key(brw, &key);
- if (!brw_search_cache(&brw->cache, BRW_WM_PROG,
+ if (!brw_search_cache(&brw->cache, BRW_CACHE_FS_PROG,
&key, sizeof(key),
- &brw->wm.prog_offset, &brw->wm.prog_data)) {
- bool success = do_wm_prog(brw, ctx->Shader.CurrentFragmentProgram, fp,
- &key);
+ &brw->wm.base.prog_offset, &brw->wm.prog_data)) {
+ bool success = brw_codegen_wm_prog(brw, current, fp, &key);
(void) success;
assert(success);
}
+ brw->wm.base.prog_data = &brw->wm.prog_data->base;
}
+bool
+brw_fs_precompile(struct gl_context *ctx,
+ struct gl_shader_program *shader_prog,
+ struct gl_program *prog)
+{
+ struct brw_context *brw = brw_context(ctx);
+ struct brw_wm_prog_key key;
+
+ struct gl_fragment_program *fp = (struct gl_fragment_program *) prog;
+ struct brw_fragment_program *bfp = brw_fragment_program(fp);
+
+ memset(&key, 0, sizeof(key));
+
+ if (brw->gen < 6) {
+ if (fp->UsesKill)
+ key.iz_lookup |= IZ_PS_KILL_ALPHATEST_BIT;
+
+ if (fp->Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
+ key.iz_lookup |= IZ_PS_COMPUTES_DEPTH_BIT;
-const struct brw_tracked_state brw_wm_prog = {
- .dirty = {
- .mesa = (_NEW_COLOR |
- _NEW_DEPTH |
- _NEW_STENCIL |
- _NEW_POLYGON |
- _NEW_LINE |
- _NEW_LIGHT |
- _NEW_FRAG_CLAMP |
- _NEW_BUFFERS |
- _NEW_TEXTURE),
- .brw = (BRW_NEW_FRAGMENT_PROGRAM |
- BRW_NEW_WM_INPUT_DIMENSIONS |
- BRW_NEW_REDUCED_PRIMITIVE),
- .cache = CACHE_NEW_VS_PROG,
- },
- .emit = brw_upload_wm_prog
-};
+ /* Just assume depth testing. */
+ key.iz_lookup |= IZ_DEPTH_TEST_ENABLE_BIT;
+ key.iz_lookup |= IZ_DEPTH_WRITE_ENABLE_BIT;
+ }
+
+ if (brw->gen < 6 || _mesa_bitcount_64(fp->Base.InputsRead &
+ BRW_FS_VARYING_INPUT_MASK) > 16)
+ key.input_slots_valid = fp->Base.InputsRead | VARYING_BIT_POS;
+
+ brw_setup_tex_for_precompile(brw, &key.tex, &fp->Base);
+
+ key.nr_color_regions = _mesa_bitcount_64(fp->Base.OutputsWritten &
+ ~(BITFIELD64_BIT(FRAG_RESULT_DEPTH) |
+ BITFIELD64_BIT(FRAG_RESULT_STENCIL) |
+ BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK)));
+
+ key.program_string_id = bfp->id;
+ /* Whether reads from the framebuffer should behave coherently. */
+ key.coherent_fb_fetch = ctx->Extensions.MESA_shader_framebuffer_fetch;
+
+ uint32_t old_prog_offset = brw->wm.base.prog_offset;
+ struct brw_wm_prog_data *old_prog_data = brw->wm.prog_data;
+
+ bool success = brw_codegen_wm_prog(brw, shader_prog, bfp, &key);
+
+ brw->wm.base.prog_offset = old_prog_offset;
+ brw->wm.prog_data = old_prog_data;
+
+ return success;
+}
projects / mesa.git / blobdiff