bool
brw_color_buffer_write_enabled(struct brw_context *brw)
{
- struct gl_context *ctx = &brw->intel.ctx;
+ struct gl_context *ctx = &brw->ctx;
const struct gl_fragment_program *fp = brw->fragment_program;
int i;
static void
brw_upload_wm_unit(struct brw_context *brw)
{
- struct intel_context *intel = &brw->intel;
- struct gl_context *ctx = &intel->ctx;
+ struct gl_context *ctx = &brw->ctx;
const struct gl_fragment_program *fp = brw->fragment_program;
struct brw_wm_unit_state *wm;
(wm->wm9.grf_reg_count_2 << 1)) >> 6;
wm->thread1.depth_coef_urb_read_offset = 1;
- wm->thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
+ /* Use ALT floating point mode for ARB fragment programs, because they
+ * require 0^0 == 1. Even though _CurrentFragmentProgram is used for
+ * rendering, CurrentFragmentProgram is used for this check to
+ * differentiate between the GLSL and non-GLSL cases.
+ */
+ if (ctx->Shader.CurrentFragmentProgram == NULL)
+ wm->thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
+ else
+ wm->thread1.floating_point_mode = BRW_FLOATING_POINT_IEEE_754;
wm->thread1.binding_table_entry_count = 0;
/* BRW_NEW_CURBE_OFFSETS */
wm->thread3.const_urb_entry_read_offset = brw->curbe.wm_start * 2;
- if (intel->gen == 5)
+ if (brw->gen == 5)
wm->wm4.sampler_count = 0; /* hardware requirement */
else {
/* CACHE_NEW_SAMPLER */
- wm->wm4.sampler_count = (brw->sampler.count + 1) / 4;
+ wm->wm4.sampler_count = (brw->wm.sampler_count + 1) / 4;
}
- if (brw->sampler.count) {
+ if (brw->wm.sampler_count) {
/* reloc */
- wm->wm4.sampler_state_pointer = (intel->batch.bo->offset +
- brw->sampler.offset) >> 5;
+ wm->wm4.sampler_state_pointer = (brw->batch.bo->offset +
+ brw->wm.sampler_offset) >> 5;
} else {
wm->wm4.sampler_state_pointer = 0;
}
/* _NEW_LINE */
wm->wm5.line_stipple = ctx->Line.StippleFlag;
- /* _NEW_DEPTH */
- if (unlikely(INTEL_DEBUG & DEBUG_STATS) || intel->stats_wm)
+ /* BRW_NEW_STATS_WM */
+ if (unlikely(INTEL_DEBUG & DEBUG_STATS) || brw->stats_wm)
wm->wm4.stats_enable = 1;
/* Emit scratch space relocation */
if (brw->wm.prog_data->total_scratch != 0) {
- drm_intel_bo_emit_reloc(intel->batch.bo,
+ drm_intel_bo_emit_reloc(brw->batch.bo,
brw->wm.state_offset +
offsetof(struct brw_wm_unit_state, thread2),
brw->wm.scratch_bo,
}
/* Emit sampler state relocation */
- if (brw->sampler.count != 0) {
- drm_intel_bo_emit_reloc(intel->batch.bo,
+ if (brw->wm.sampler_count != 0) {
+ drm_intel_bo_emit_reloc(brw->batch.bo,
brw->wm.state_offset +
offsetof(struct brw_wm_unit_state, wm4),
- intel->batch.bo, (brw->sampler.offset |
- wm->wm4.stats_enable |
- (wm->wm4.sampler_count << 2)),
+ brw->batch.bo, (brw->wm.sampler_offset |
+ wm->wm4.stats_enable |
+ (wm->wm4.sampler_count << 2)),
I915_GEM_DOMAIN_INSTRUCTION, 0);
}
_NEW_POLYGONSTIPPLE |
_NEW_LINE |
_NEW_COLOR |
- _NEW_DEPTH |
_NEW_BUFFERS),
.brw = (BRW_NEW_BATCH |
BRW_NEW_PROGRAM_CACHE |
BRW_NEW_FRAGMENT_PROGRAM |
- BRW_NEW_CURBE_OFFSETS),
+ BRW_NEW_CURBE_OFFSETS |
+ BRW_NEW_STATS_WM),
.cache = (CACHE_NEW_WM_PROG |
CACHE_NEW_SAMPLER)