i965: Fix handling of drawing to MESA_FORMAT_XRGB8888

[mesa.git] / src / mesa / drivers / dri / i965 / brw_wm_surface_state.c

diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index b7b6eaec2bb842143042301a752eff694b6d2593..74cf66f9f8b85740e1f8af86705b871c99ccea13 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -538,11 +538,15 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
 
       key.surface_type = BRW_SURFACE_2D;
       switch (irb->Base.Format) {
+      /* XRGB and ARGB are treated the same here because the chips in this
+       * family cannot render to XRGB targets.  This means that we have to
+       * mask writes to alpha (ala glColorMask) and reconfigure the alpha
+       * blending hardware to use GL_ONE (or GL_ZERO) for cases where
+       * GL_DST_ALPHA (or GL_ONE_MINUS_DST_ALPHA) is used.
+       */
       case MESA_FORMAT_ARGB8888:
-        key.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
-        break;
       case MESA_FORMAT_XRGB8888:
-        key.surface_format = BRW_SURFACEFORMAT_B8G8R8X8_UNORM;
+        key.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
         break;
       case MESA_FORMAT_RGB565:
         key.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM;
@@ -579,6 +583,13 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
    /* _NEW_COLOR */
    memcpy(key.color_mask, ctx->Color.ColorMask,
          sizeof(key.color_mask));
+
+   /* As mentioned above, disable writes to the alpha component when the
+    * renderbuffer is XRGB.
+    */
+   if (ctx->Visual.alphaBits == 0)
+     key.color_mask[3] = GL_FALSE;
+
    key.color_blend = (!ctx->Color._LogicOpEnabled &&
                      ctx->Color.BlendEnabled);