i965/fs: Add support for translating ir_triop_fma into MAD.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_wm_surface_state.c

diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 16579f946efce85c6bb6da330fa9a048bc4eb256..e2c7b77472d86ed7cdf50eb51caf1d2d2bff1b31 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -873,15 +873,14 @@ brw_upload_wm_binding_table(struct brw_context *brw)
       gen7_create_shader_time_surface(brw, &brw->wm.surf_offset[SURF_INDEX_WM_SHADER_TIME]);
    }
 
-   /* Might want to calculate nr_surfaces first, to avoid taking up so much
-    * space for the binding table.
-    */
+   /* CACHE_NEW_WM_PROG */
+   unsigned entries = brw->wm.prog_data->binding_table_size;
    bind = brw_state_batch(brw, AUB_TRACE_BINDING_TABLE,
-                         sizeof(uint32_t) * BRW_MAX_WM_SURFACES,
+                         sizeof(uint32_t) * entries,
                          32, &brw->wm.bind_bo_offset);
 
    /* BRW_NEW_SURFACES */
-   for (i = 0; i < BRW_MAX_WM_SURFACES; i++) {
+   for (i = 0; i < entries; i++) {
       bind[i] = brw->wm.surf_offset[i];
    }
 
@@ -893,7 +892,7 @@ const struct brw_tracked_state brw_wm_binding_table = {
       .mesa = 0,
       .brw = (BRW_NEW_BATCH |
              BRW_NEW_SURFACES),
-      .cache = 0
+      .cache = CACHE_NEW_WM_PROG
    },
    .emit = brw_upload_wm_binding_table,
 };