i965/draw: Account for BaseInstance in VBO bounds

[mesa.git] / src / mesa / drivers / dri / i965 / gen6_depthstencil.c

diff --git a/src/mesa/drivers/dri/i965/gen6_depthstencil.c b/src/mesa/drivers/dri/i965/gen6_depthstencil.c
index 940d91f7c92e6a84623c5aad82284b3d53aa18a4..a3de8448336816a29db6dccdd68f156648b63c4a 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen6_depthstencil.c
+++ b/src/mesa/drivers/dri/i965/gen6_depthstencil.c
@@ -25,14 +25,16 @@
  *
  */
 
+#include "intel_batchbuffer.h"
 #include "intel_fbo.h"
 #include "brw_context.h"
+#include "brw_defines.h"
 #include "brw_state.h"
 
 static void
 gen6_upload_depth_stencil_state(struct brw_context *brw)
 {
-   struct gl_context *ctx = &brw->intel.ctx;
+   struct gl_context *ctx = &brw->ctx;
    struct gen6_depth_stencil_state *ds;
    struct intel_renderbuffer *depth_irb;
 
@@ -44,7 +46,7 @@ gen6_upload_depth_stencil_state(struct brw_context *brw)
                        &brw->cc.depth_stencil_state_offset);
    memset(ds, 0, sizeof(*ds));
 
-   /* _NEW_STENCIL */
+   /* _NEW_STENCIL | _NEW_BUFFERS */
    if (ctx->Stencil._Enabled) {
       int back = ctx->Stencil._BackFace;
 
@@ -84,14 +86,30 @@ gen6_upload_depth_stencil_state(struct brw_context *brw)
       ds->ds2.depth_write_enable = ctx->Depth.Mask;
    }
 
-   brw->state.dirty.cache |= CACHE_NEW_DEPTH_STENCIL_STATE;
+   /* Point the GPU at the new indirect state. */
+   if (brw->gen == 6) {
+      BEGIN_BATCH(4);
+      OUT_BATCH(_3DSTATE_CC_STATE_POINTERS << 16 | (4 - 2));
+      OUT_BATCH(0);
+      OUT_BATCH(brw->cc.depth_stencil_state_offset | 1);
+      OUT_BATCH(0);
+      ADVANCE_BATCH();
+   } else {
+      BEGIN_BATCH(2);
+      OUT_BATCH(_3DSTATE_DEPTH_STENCIL_STATE_POINTERS << 16 | (2 - 2));
+      OUT_BATCH(brw->cc.depth_stencil_state_offset | 1);
+      ADVANCE_BATCH();
+   }
 }
 
 const struct brw_tracked_state gen6_depth_stencil_state = {
    .dirty = {
-      .mesa = _NEW_DEPTH | _NEW_STENCIL | _NEW_BUFFERS,
-      .brw  = BRW_NEW_BATCH,
-      .cache = 0,
+      .mesa = _NEW_BUFFERS |
+              _NEW_DEPTH |
+              _NEW_STENCIL,
+      .brw  = BRW_NEW_BATCH |
+              BRW_NEW_BLORP |
+              BRW_NEW_STATE_BASE_ADDRESS,
    },
    .emit = gen6_upload_depth_stencil_state,
 };