i965: Rename various gen6 #defines to match the documentation.

[mesa.git] / src / mesa / drivers / dri / i965 / gen6_gs_state.c

diff --git a/src/mesa/drivers/dri/i965/gen6_gs_state.c b/src/mesa/drivers/dri/i965/gen6_gs_state.c
index cefc93ba48b13fed9482231f98cd5c8b3ed9b86c..7296c7cd1b04268c988840f0235c4e1fa2b2c6ae 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen6_gs_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_gs_state.c
@@ -37,18 +37,16 @@ upload_gs_state(struct brw_context *brw)
 
    /* Disable all the constant buffers. */
    BEGIN_BATCH(5);
-   OUT_BATCH(CMD_3D_CONSTANT_GS_STATE << 16 | (5 - 2));
+   OUT_BATCH(_3DSTATE_CONSTANT_GS << 16 | (5 - 2));
    OUT_BATCH(0);
    OUT_BATCH(0);
    OUT_BATCH(0);
    OUT_BATCH(0);
    ADVANCE_BATCH();
 
-   intel_batchbuffer_emit_mi_flush(intel->batch);
-
    if (brw->gs.prog_bo) {
       BEGIN_BATCH(7);
-      OUT_BATCH(CMD_3D_GS_STATE << 16 | (7 - 2));
+      OUT_BATCH(_3DSTATE_GS << 16 | (7 - 2));
       OUT_RELOC(brw->gs.prog_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
       OUT_BATCH(GEN6_GS_SPF_MODE |
                (0 << GEN6_GS_SAMPLER_COUNT_SHIFT) |
@@ -64,7 +62,7 @@ upload_gs_state(struct brw_context *brw)
       ADVANCE_BATCH();
    } else {
       BEGIN_BATCH(7);
-      OUT_BATCH(CMD_3D_GS_STATE << 16 | (7 - 2));
+      OUT_BATCH(_3DSTATE_GS << 16 | (7 - 2));
       OUT_BATCH(0); /* prog_bo */
       OUT_BATCH((0 << GEN6_GS_SAMPLER_COUNT_SHIFT) |
                (0 << GEN6_GS_BINDING_TABLE_ENTRY_COUNT_SHIFT));