i965: Avoid extra MOV in VS indirect register reads.

[mesa.git] / src / mesa / drivers / dri / i965 / gen6_gs_state.c

diff --git a/src/mesa/drivers/dri/i965/gen6_gs_state.c b/src/mesa/drivers/dri/i965/gen6_gs_state.c
index 161e7b85c289c1335458741d6527ae72bf18c349..cefc93ba48b13fed9482231f98cd5c8b3ed9b86c 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen6_gs_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_gs_state.c
@@ -50,7 +50,8 @@ upload_gs_state(struct brw_context *brw)
       BEGIN_BATCH(7);
       OUT_BATCH(CMD_3D_GS_STATE << 16 | (7 - 2));
       OUT_RELOC(brw->gs.prog_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
-      OUT_BATCH((0 << GEN6_GS_SAMPLER_COUNT_SHIFT) |
+      OUT_BATCH(GEN6_GS_SPF_MODE |
+               (0 << GEN6_GS_SAMPLER_COUNT_SHIFT) |
                (0 << GEN6_GS_BINDING_TABLE_ENTRY_COUNT_SHIFT));
       OUT_BATCH(0); /* scratch space base offset */
       OUT_BATCH((1 << GEN6_GS_DISPATCH_START_GRF_SHIFT) |