i965: fix the constant interp bitmask for flat mode

[mesa.git] / src / mesa / drivers / dri / i965 / gen6_sf_state.c

diff --git a/src/mesa/drivers/dri/i965/gen6_sf_state.c b/src/mesa/drivers/dri/i965/gen6_sf_state.c
index 4482e9cc09fd9ae5e0b640f5cd3619651fdb9ee7..5cbfe78c6f0f8c852fdee0d35da5febcad885ba6 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen6_sf_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_sf_state.c
@@ -263,12 +263,6 @@ upload_sf_state(struct brw_context *brw)
         (1 << GEN6_SF_TRIFAN_PROVOKE_SHIFT);
    }
 
-   /* flat shading */
-   if (ctx->Light.ShadeModel == GL_FLAT) {
-       dw17 |= ((brw->fragment_program->Base.InputsRead & (FRAG_BIT_COL0 | FRAG_BIT_COL1)) >>
-                ((brw->fragment_program->Base.InputsRead & FRAG_BIT_WPOS) ? 0 : 1));
-   }
-
    /* Create the mapping from the FS inputs we produce to the VS outputs
     * they source from.
     */
@@ -286,6 +280,19 @@ upload_sf_state(struct brw_context *brw)
       if (attr == FRAG_ATTRIB_PNTC)
         dw16 |= (1 << input_index);
 
+      /* flat shading */
+      if (ctx->Light.ShadeModel == GL_FLAT) {
+         /*
+          * Setup the Constant Interpolation Enable bit mask for each
+          * corresponding attribute(currently, we only care two attrs:
+          * FRAG_BIT_COL0 and FRAG_BIT_COL1).
+          *
+          * FIXME: should we care other attributes?
+          */
+         if (attr == FRAG_ATTRIB_COL0 || attr == FRAG_ATTRIB_COL1)
+             dw17 |= (1 << input_index);
+      }
+
       /* The hardware can only do the overrides on 16 overrides at a
        * time, and the other up to 16 have to be lined up so that the
        * input index = the output index.  We'll need to do some