i965/vec4: Make with_writemask() non-static.
[mesa.git] / src / mesa / drivers / dri / i965 / gen6_sol.c
index 7aa6140bd978ea9af30627aed14aee478b6345b0..21da444247f14060a3a3304400dd05130ed89cfe 100644 (file)
@@ -36,8 +36,8 @@
 static void
 gen6_update_sol_surfaces(struct brw_context *brw)
 {
-   struct gl_context *ctx = &brw->intel.ctx;
-   /* _NEW_TRANSFORM_FEEDBACK */
+   struct gl_context *ctx = &brw->ctx;
+   /* BRW_NEW_TRANSFORM_FEEDBACK */
    struct gl_transform_feedback_object *xfb_obj =
       ctx->TransformFeedback.CurrentObject;
    /* BRW_NEW_VERTEX_PROGRAM */
@@ -48,19 +48,19 @@ gen6_update_sol_surfaces(struct brw_context *brw)
    int i;
 
    for (i = 0; i < BRW_MAX_SOL_BINDINGS; ++i) {
-      const int surf_index = SURF_INDEX_SOL_BINDING(i);
-      if (xfb_obj->Active && !xfb_obj->Paused &&
+      const int surf_index = SURF_INDEX_GEN6_SOL_BINDING(i);
+      if (_mesa_is_xfb_active_and_unpaused(ctx) &&
           i < linked_xfb_info->NumOutputs) {
          unsigned buffer = linked_xfb_info->Outputs[i].OutputBuffer;
          unsigned buffer_offset =
             xfb_obj->Offset[buffer] / 4 +
             linked_xfb_info->Outputs[i].DstOffset;
          brw_update_sol_surface(
-            brw, xfb_obj->Buffers[buffer], &brw->gs.surf_offset[surf_index],
+            brw, xfb_obj->Buffers[buffer], &brw->ff_gs.surf_offset[surf_index],
             linked_xfb_info->Outputs[i].NumComponents,
             linked_xfb_info->BufferStride[buffer], buffer_offset);
       } else {
-         brw->gs.surf_offset[surf_index] = 0;
+         brw->ff_gs.surf_offset[surf_index] = 0;
       }
    }
 
@@ -69,9 +69,10 @@ gen6_update_sol_surfaces(struct brw_context *brw)
 
 const struct brw_tracked_state gen6_sol_surface = {
    .dirty = {
-      .mesa = _NEW_TRANSFORM_FEEDBACK,
+      .mesa = 0,
       .brw = (BRW_NEW_BATCH |
-              BRW_NEW_VERTEX_PROGRAM),
+              BRW_NEW_VERTEX_PROGRAM |
+              BRW_NEW_TRANSFORM_FEEDBACK),
       .cache = 0
    },
    .emit = gen6_update_sol_surfaces,
@@ -84,7 +85,7 @@ const struct brw_tracked_state gen6_sol_surface = {
 static void
 brw_gs_upload_binding_table(struct brw_context *brw)
 {
-   struct gl_context *ctx = &brw->intel.ctx;
+   struct gl_context *ctx = &brw->ctx;
    /* BRW_NEW_VERTEX_PROGRAM */
    const struct gl_shader_program *shaderprog =
       ctx->Shader.CurrentVertexProgram;
@@ -100,9 +101,9 @@ brw_gs_upload_binding_table(struct brw_context *brw)
 
    /* Skip making a binding table if we don't have anything to put in it. */
    if (!has_surfaces) {
-      if (brw->gs.bind_bo_offset != 0) {
+      if (brw->ff_gs.bind_bo_offset != 0) {
         brw->state.dirty.brw |= BRW_NEW_GS_BINDING_TABLE;
-        brw->gs.bind_bo_offset = 0;
+        brw->ff_gs.bind_bo_offset = 0;
       }
       return;
    }
@@ -111,11 +112,11 @@ brw_gs_upload_binding_table(struct brw_context *brw)
     * space for the binding table.
     */
    bind = brw_state_batch(brw, AUB_TRACE_BINDING_TABLE,
-                         sizeof(uint32_t) * BRW_MAX_GS_SURFACES,
-                         32, &brw->gs.bind_bo_offset);
+                         sizeof(uint32_t) * BRW_MAX_GEN6_GS_SURFACES,
+                         32, &brw->ff_gs.bind_bo_offset);
 
    /* BRW_NEW_SURFACES */
-   memcpy(bind, brw->gs.surf_offset, BRW_MAX_GS_SURFACES * sizeof(uint32_t));
+   memcpy(bind, brw->ff_gs.surf_offset, BRW_MAX_GEN6_GS_SURFACES * sizeof(uint32_t));
 
    brw->state.dirty.brw |= BRW_NEW_GS_BINDING_TABLE;
 }
@@ -131,29 +132,6 @@ const struct brw_tracked_state gen6_gs_binding_table = {
    .emit = brw_gs_upload_binding_table,
 };
 
-static void
-gen6_update_sol_indices(struct brw_context *brw)
-{
-   struct intel_context *intel = &brw->intel;
-
-   BEGIN_BATCH(4);
-   OUT_BATCH(_3DSTATE_GS_SVB_INDEX << 16 | (4 - 2));
-   OUT_BATCH(0);
-   OUT_BATCH(brw->sol.svbi_0_starting_index); /* BRW_NEW_SOL_INDICES */
-   OUT_BATCH(brw->sol.svbi_0_max_index); /* BRW_NEW_SOL_INDICES */
-   ADVANCE_BATCH();
-}
-
-const struct brw_tracked_state gen6_sol_indices = {
-   .dirty = {
-      .mesa = 0,
-      .brw = (BRW_NEW_BATCH |
-              BRW_NEW_SOL_INDICES),
-      .cache = 0
-   },
-   .emit = gen6_update_sol_indices,
-};
-
 void
 brw_begin_transform_feedback(struct gl_context *ctx, GLenum mode,
                             struct gl_transform_feedback_object *obj)
@@ -166,6 +144,8 @@ brw_begin_transform_feedback(struct gl_context *ctx, GLenum mode,
    struct gl_transform_feedback_object *xfb_obj =
       ctx->TransformFeedback.CurrentObject;
 
+   assert(brw->gen == 6);
+
    /* Compute the maximum number of vertices that we can write without
     * overflowing any of the buffers currently being used for feedback.
     */
@@ -173,13 +153,26 @@ brw_begin_transform_feedback(struct gl_context *ctx, GLenum mode,
       = _mesa_compute_max_transform_feedback_vertices(xfb_obj,
                                                       linked_xfb_info);
 
-   /* Initialize the SVBI 0 register to zero and set the maximum index.
-    * These values will be sent to the hardware on the next draw.
+   /* Initialize the SVBI 0 register to zero and set the maximum index. */
+   BEGIN_BATCH(4);
+   OUT_BATCH(_3DSTATE_GS_SVB_INDEX << 16 | (4 - 2));
+   OUT_BATCH(0); /* SVBI 0 */
+   OUT_BATCH(0); /* starting index */
+   OUT_BATCH(max_index);
+   ADVANCE_BATCH();
+
+   /* Initialize the rest of the unused streams to sane values.  Otherwise,
+    * they may indicate that there is no room to write data and prevent
+    * anything from happening at all.
     */
-   brw->state.dirty.brw |= BRW_NEW_SOL_INDICES;
-   brw->sol.svbi_0_starting_index = 0;
-   brw->sol.svbi_0_max_index = max_index;
-   brw->sol.offset_0_batch_start = 0;
+   for (int i = 1; i < 4; i++) {
+      BEGIN_BATCH(4);
+      OUT_BATCH(_3DSTATE_GS_SVB_INDEX << 16 | (4 - 2));
+      OUT_BATCH(i << SVB_INDEX_SHIFT);
+      OUT_BATCH(0); /* starting index */
+      OUT_BATCH(0xffffffff);
+      ADVANCE_BATCH();
+   }
 }
 
 void
@@ -193,6 +186,5 @@ brw_end_transform_feedback(struct gl_context *ctx,
     * simplicity, just do a full flush.
     */
    struct brw_context *brw = brw_context(ctx);
-   struct intel_context *intel = &brw->intel;
-   intel_batchbuffer_emit_mi_flush(intel);
+   intel_batchbuffer_emit_mi_flush(brw);
 }