i965/nir/vec4: Add get_nir_dst() and get_nir_src() methods

[mesa.git] / src / mesa / drivers / dri / i965 / gen6_urb.c

diff --git a/src/mesa/drivers/dri/i965/gen6_urb.c b/src/mesa/drivers/dri/i965/gen6_urb.c
index 7af1f37bad8fa28061256bd3a3569d6744caeb28..c7311fd0b03137bf92b731f3515a5cbdbc5fd8a5 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen6_urb.c
+++ b/src/mesa/drivers/dri/i965/gen6_urb.c
@@ -54,7 +54,7 @@ gen6_upload_urb( struct brw_context *brw )
 
    bool gs_present = brw->ff_gs.prog_active || brw->geometry_program;
 
-   /* CACHE_NEW_VS_PROG */
+   /* BRW_NEW_VS_PROG_DATA */
    unsigned vs_size = MAX2(brw->vs.prog_data->base.urb_entry_size, 1);
 
    /* Whe using GS to do transform feedback only we use the same VUE layout for
@@ -119,16 +119,19 @@ gen6_upload_urb( struct brw_context *brw )
     * doesn't exist on Gen6).  So for now we just do a full pipeline flush as
     * a workaround.
     */
-   if (brw->urb.gen6_gs_previously_active && !gs_present)
-      intel_batchbuffer_emit_mi_flush(brw);
-   brw->urb.gen6_gs_previously_active = gs_present;
+   if (brw->urb.gs_present && !gs_present)
+      brw_emit_mi_flush(brw);
+   brw->urb.gs_present = gs_present;
 }
 
 const struct brw_tracked_state gen6_urb = {
    .dirty = {
       .mesa = 0,
-      .brw = (BRW_NEW_CONTEXT | BRW_NEW_GEOMETRY_PROGRAM),
-      .cache = (CACHE_NEW_VS_PROG | CACHE_NEW_GS_PROG | CACHE_NEW_FF_GS_PROG),
+      .brw = BRW_NEW_CONTEXT |
+             BRW_NEW_FF_GS_PROG_DATA |
+             BRW_NEW_GEOMETRY_PROGRAM |
+             BRW_NEW_GS_PROG_DATA |
+             BRW_NEW_VS_PROG_DATA,
    },
    .emit = gen6_upload_urb,
 };