#include "program/prog_statevars.h"
#include "intel_batchbuffer.h"
-void
-gen6_upload_vec4_push_constants(struct brw_context *brw,
- const struct gl_program *prog,
- const struct brw_vec4_prog_data *prog_data,
- struct brw_stage_state *stage_state,
- enum state_struct_type type)
-{
- struct gl_context *ctx = &brw->ctx;
-
- /* Updates the ParamaterValues[i] pointers for all parameters of the
- * basic type of PROGRAM_STATE_VAR.
- */
- /* XXX: Should this happen somewhere before to get our state flag set? */
- _mesa_load_state_parameters(ctx, prog->Parameters);
-
- if (prog_data->nr_params == 0) {
- stage_state->push_const_size = 0;
- } else {
- int params_uploaded;
- float *param;
- int i;
-
- param = brw_state_batch(brw, type,
- prog_data->nr_params * sizeof(float),
- 32, &stage_state->push_const_offset);
-
- /* _NEW_PROGRAM_CONSTANTS
- *
- * Also _NEW_TRANSFORM -- we may reference clip planes other than as a
- * side effect of dereferencing uniforms, so _NEW_PROGRAM_CONSTANTS
- * wouldn't be set for them.
- */
- for (i = 0; i < prog_data->nr_params; i++) {
- param[i] = *prog_data->param[i];
- }
- params_uploaded = prog_data->nr_params / 4;
-
- if (0) {
- printf("Constant buffer:\n");
- for (i = 0; i < params_uploaded; i++) {
- float *buf = param + i * 4;
- printf("%d: %f %f %f %f\n",
- i, buf[0], buf[1], buf[2], buf[3]);
- }
- }
-
- stage_state->push_const_size = (params_uploaded + 1) / 2;
- /* We can only push 32 registers of constants at a time. */
- assert(stage_state->push_const_size <= 32);
- }
-}
-
static void
gen6_upload_vs_push_constants(struct brw_context *brw)
{
/* _BRW_NEW_VERTEX_PROGRAM */
const struct brw_vertex_program *vp =
brw_vertex_program_const(brw->vertex_program);
- /* CACHE_NEW_VS_PROG */
- const struct brw_vec4_prog_data *prog_data = &brw->vs.prog_data->base;
+ /* BRW_NEW_VS_PROG_DATA */
+ const struct brw_stage_prog_data *prog_data = &brw->vs.prog_data->base.base;
+
+ gen6_upload_push_constants(brw, &vp->program.Base, prog_data,
+ stage_state, AUB_TRACE_VS_CONSTANTS);
- gen6_upload_vec4_push_constants(brw, &vp->program.Base, prog_data,
- stage_state, AUB_TRACE_VS_CONSTANTS);
+ if (brw->gen >= 7) {
+ if (brw->gen == 7 && !brw->is_haswell && !brw->is_baytrail)
+ gen7_emit_vs_workaround_flush(brw);
+
+ gen7_upload_constant_state(brw, stage_state, true /* active */,
+ _3DSTATE_CONSTANT_VS);
+ }
}
const struct brw_tracked_state gen6_vs_push_constants = {
.dirty = {
- .mesa = _NEW_TRANSFORM | _NEW_PROGRAM_CONSTANTS,
- .brw = (BRW_NEW_BATCH |
- BRW_NEW_VERTEX_PROGRAM),
- .cache = CACHE_NEW_VS_PROG,
+ .mesa = _NEW_PROGRAM_CONSTANTS |
+ _NEW_TRANSFORM,
+ .brw = BRW_NEW_BATCH |
+ BRW_NEW_BLORP |
+ BRW_NEW_PUSH_CONSTANT_ALLOCATION |
+ BRW_NEW_VERTEX_PROGRAM |
+ BRW_NEW_VS_PROG_DATA,
},
.emit = gen6_upload_vs_push_constants,
};
static void
upload_vs_state(struct brw_context *brw)
{
- struct gl_context *ctx = &brw->ctx;
const struct brw_stage_state *stage_state = &brw->vs.base;
uint32_t floating_point_mode = 0;
* flush can be executed by sending a PIPE_CONTROL command with CS
* stall bit set and a post sync operation.
*
- * Although we don't disable the VS during normal drawing, BLORP sometimes
- * disables it. To be safe, do the flush here just in case.
+ * We've already done such a flush at the start of state upload, so we
+ * don't need to do another one here.
*/
- intel_emit_post_sync_nonzero_flush(brw);
if (stage_state->push_const_size == 0) {
/* Disable the push constant buffers. */
ADVANCE_BATCH();
}
- /* Use ALT floating point mode for ARB vertex programs, because they
- * require 0^0 == 1.
- */
- if (ctx->Shader.CurrentProgram[MESA_SHADER_VERTEX] == NULL)
+ if (brw->vs.prog_data->base.base.use_alt_mode)
floating_point_mode = GEN6_VS_FLOATING_POINT_MODE_ALT;
BEGIN_BATCH(6);
((brw->vs.prog_data->base.base.binding_table.size_bytes / 4) <<
GEN6_VS_BINDING_TABLE_ENTRY_COUNT_SHIFT));
- if (brw->vs.prog_data->base.total_scratch) {
+ if (brw->vs.prog_data->base.base.total_scratch) {
OUT_RELOC(stage_state->scratch_bo,
I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
- ffs(brw->vs.prog_data->base.total_scratch) - 11);
+ ffs(brw->vs.prog_data->base.base.total_scratch) - 11);
} else {
OUT_BATCH(0);
}
- OUT_BATCH((brw->vs.prog_data->base.dispatch_grf_start_reg <<
+ OUT_BATCH((brw->vs.prog_data->base.base.dispatch_grf_start_reg <<
GEN6_VS_DISPATCH_START_GRF_SHIFT) |
(brw->vs.prog_data->base.urb_read_length << GEN6_VS_URB_READ_LENGTH_SHIFT) |
(0 << GEN6_VS_URB_ENTRY_READ_OFFSET_SHIFT));
* bug reports that led to this workaround, and may be more than
* what is strictly required to avoid the issue.
*/
- intel_emit_post_sync_nonzero_flush(brw);
brw_emit_pipe_control_flush(brw,
PIPE_CONTROL_DEPTH_STALL |
- PIPE_CONTROL_INSTRUCTION_FLUSH |
+ PIPE_CONTROL_INSTRUCTION_INVALIDATE |
PIPE_CONTROL_STATE_CACHE_INVALIDATE);
}
const struct brw_tracked_state gen6_vs_state = {
.dirty = {
- .mesa = _NEW_TRANSFORM | _NEW_PROGRAM_CONSTANTS,
- .brw = (BRW_NEW_CONTEXT |
- BRW_NEW_VERTEX_PROGRAM |
- BRW_NEW_BATCH |
- BRW_NEW_PUSH_CONSTANT_ALLOCATION),
- .cache = CACHE_NEW_VS_PROG | CACHE_NEW_SAMPLER
+ .mesa = _NEW_PROGRAM_CONSTANTS |
+ _NEW_TRANSFORM,
+ .brw = BRW_NEW_BATCH |
+ BRW_NEW_BLORP |
+ BRW_NEW_CONTEXT |
+ BRW_NEW_PUSH_CONSTANT_ALLOCATION |
+ BRW_NEW_VERTEX_PROGRAM |
+ BRW_NEW_VS_PROG_DATA,
},
.emit = upload_vs_state,
};
projects / mesa.git / blobdiff