i965: Mostly fix glsl-max-varyings.
[mesa.git] / src / mesa / drivers / dri / i965 / gen6_vs_state.c
index 211a6231c9f3a1b3bb8472db24e05ce612e83a34..4080a9dedfd50e0a2659d0ab4d89ba68800bbfc0 100644 (file)
@@ -29,8 +29,8 @@
 #include "brw_state.h"
 #include "brw_defines.h"
 #include "brw_util.h"
-#include "shader/prog_parameter.h"
-#include "shader/prog_statevars.h"
+#include "program/prog_parameter.h"
+#include "program/prog_statevars.h"
 #include "intel_batchbuffer.h"
 
 static void
@@ -65,13 +65,13 @@ upload_vs_state(struct brw_context *brw)
       constant_bo = drm_intel_bo_alloc(intel->bufmgr, "VS constant_bo",
                                       nr_params * 4 * sizeof(float),
                                       4096);
-      intel_bo_map_gtt_preferred(intel, constant_bo, GL_TRUE);
+      drm_intel_gem_bo_map_gtt(constant_bo);
       for (i = 0; i < nr_params; i++) {
         memcpy((char *)constant_bo->virtual + i * 4 * sizeof(float),
                vp->program.Base.Parameters->ParameterValues[i],
                4 * sizeof(float));
       }
-      intel_bo_unmap_gtt_preferred(intel, constant_bo);
+      drm_intel_gem_bo_unmap_gtt(constant_bo);
 
       BEGIN_BATCH(5);
       OUT_BATCH(CMD_3D_CONSTANT_VS_STATE << 16 |
@@ -100,7 +100,8 @@ upload_vs_state(struct brw_context *brw)
             (brw->vs.prog_data->urb_read_length << GEN6_VS_URB_READ_LENGTH_SHIFT) |
             (0 << GEN6_VS_URB_ENTRY_READ_OFFSET_SHIFT));
    OUT_BATCH((0 << GEN6_VS_MAX_THREADS_SHIFT) |
-            GEN6_VS_STATISTICS_ENABLE);
+            GEN6_VS_STATISTICS_ENABLE |
+            GEN6_VS_ENABLE);
    ADVANCE_BATCH();
 
    intel_batchbuffer_emit_mi_flush(intel->batch);