i965: Create prog_data temporary variables in PS state upload code.
[mesa.git] / src / mesa / drivers / dri / i965 / gen6_wm_state.c
index 042b47d1db54a8dee8e898314211929ff7d7aa01..8081cccae51650afacae3ab71f8213286006ae4e 100644 (file)
 static void
 gen6_upload_wm_push_constants(struct brw_context *brw)
 {
-   struct gl_context *ctx = &brw->ctx;
+   struct brw_stage_state *stage_state = &brw->wm.base;
    /* BRW_NEW_FRAGMENT_PROGRAM */
    const struct brw_fragment_program *fp =
       brw_fragment_program_const(brw->fragment_program);
    /* CACHE_NEW_WM_PROG */
    const struct brw_wm_prog_data *prog_data = brw->wm.prog_data;
 
-   /* Updates the ParameterValues[i] pointers for all parameters of the
-    * basic type of PROGRAM_STATE_VAR.
-    */
-   /* XXX: Should this happen somewhere before to get our state flag set? */
-   _mesa_load_state_parameters(ctx, fp->program.Base.Parameters);
-
-   if (prog_data->base.nr_params == 0) {
-      brw->wm.base.push_const_size = 0;
-   } else {
-      float *constants;
-      unsigned int i;
-
-      constants = brw_state_batch(brw, AUB_TRACE_WM_CONSTANTS,
-                                 prog_data->base.nr_params * sizeof(float),
-                                 32, &brw->wm.base.push_const_offset);
-
-      for (i = 0; i < prog_data->base.nr_params; i++) {
-        constants[i] = *prog_data->base.param[i];
-      }
-
-      if (0) {
-        fprintf(stderr, "WM constants:\n");
-        for (i = 0; i < prog_data->base.nr_params; i++) {
-           if ((i & 7) == 0)
-              fprintf(stderr, "g%d: ",
-                       prog_data->base.dispatch_grf_start_reg + i / 8);
-           fprintf(stderr, "%8f ", constants[i]);
-           if ((i & 7) == 7)
-              fprintf(stderr, "\n");
-        }
-        if ((i & 7) != 0)
-           fprintf(stderr, "\n");
-        fprintf(stderr, "\n");
-      }
-
-      brw->wm.base.push_const_size = ALIGN(prog_data->base.nr_params, 8) / 8;
-   }
+   gen6_upload_push_constants(brw, &fp->program.Base, &prog_data->base,
+                              stage_state, AUB_TRACE_WM_CONSTANTS);
 
    if (brw->gen >= 7) {
       gen7_upload_constant_state(brw, &brw->wm.base, true,
@@ -104,15 +69,23 @@ static void
 upload_wm_state(struct brw_context *brw)
 {
    struct gl_context *ctx = &brw->ctx;
+   /* BRW_NEW_FRAGMENT_PROGRAM */
    const struct brw_fragment_program *fp =
       brw_fragment_program_const(brw->fragment_program);
-   uint32_t dw2, dw4, dw5, dw6;
+   /* CACHE_NEW_WM_PROG */
+   const struct brw_wm_prog_data *prog_data = brw->wm.prog_data;
+   uint32_t dw2, dw4, dw5, dw6, ksp0, ksp2;
 
    /* _NEW_BUFFERS */
    bool multisampled_fbo = ctx->DrawBuffer->Visual.samples > 1;
 
-    /* CACHE_NEW_WM_PROG */
-   if (brw->wm.prog_data->base.nr_params == 0) {
+   /* We can't fold this into gen6_upload_wm_push_constants(), because
+    * according to the SNB PRM, vol 2 part 1 section 7.2.2
+    * (3DSTATE_CONSTANT_PS [DevSNB]):
+    *
+    *     "[DevSNB]: This packet must be followed by WM_STATE."
+    */
+   if (prog_data->base.nr_params == 0) {
       /* Disable the push constant buffers. */
       BEGIN_BATCH(5);
       OUT_BATCH(_3DSTATE_CONSTANT_PS << 16 | (5 - 2));
@@ -137,7 +110,7 @@ upload_wm_state(struct brw_context *brw)
       ADVANCE_BATCH();
    }
 
-   dw2 = dw4 = dw5 = dw6 = 0;
+   dw2 = dw4 = dw5 = dw6 = ksp2 = 0;
    dw4 |= GEN6_WM_STATISTICS_ENABLE;
    dw5 |= GEN6_WM_LINE_AA_WIDTH_1_0;
    dw5 |= GEN6_WM_LINE_END_CAP_AA_WIDTH_0_5;
@@ -153,14 +126,11 @@ upload_wm_state(struct brw_context *brw)
    dw2 |= (ALIGN(brw->wm.base.sampler_count, 4) / 4) <<
            GEN6_WM_SAMPLER_COUNT_SHIFT;
 
-   /* CACHE_NEW_WM_PROG */
-   dw2 |= ((brw->wm.prog_data->base.binding_table.size_bytes / 4) <<
+   dw2 |= ((prog_data->base.binding_table.size_bytes / 4) <<
            GEN6_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT);
 
    dw5 |= (brw->max_wm_threads - 1) << GEN6_WM_MAX_THREADS_SHIFT;
 
-   /* CACHE_NEW_WM_PROG */
-
    /* In case of non 1x per sample shading, only one of SIMD8 and SIMD16
     * should be enabled. We do 'SIMD16 only' dispatch if a SIMD16 shader
     * is successfully compiled. In majority of the cases that bring us
@@ -170,27 +140,32 @@ upload_wm_state(struct brw_context *brw)
       _mesa_get_min_invocations_per_fragment(ctx, brw->fragment_program, false);
    assert(min_inv_per_frag >= 1);
 
-   if (brw->wm.prog_data->prog_offset_16) {
+   if (prog_data->prog_offset_16) {
       dw5 |= GEN6_WM_16_DISPATCH_ENABLE;
 
       if (min_inv_per_frag == 1) {
          dw5 |= GEN6_WM_8_DISPATCH_ENABLE;
-         dw4 |= (brw->wm.prog_data->base.dispatch_grf_start_reg <<
+         dw4 |= (prog_data->base.dispatch_grf_start_reg <<
                  GEN6_WM_DISPATCH_START_GRF_SHIFT_0);
-         dw4 |= (brw->wm.prog_data->dispatch_grf_start_reg_16 <<
+         dw4 |= (prog_data->dispatch_grf_start_reg_16 <<
                  GEN6_WM_DISPATCH_START_GRF_SHIFT_2);
-      } else
-         dw4 |= (brw->wm.prog_data->dispatch_grf_start_reg_16 <<
+         ksp0 = brw->wm.base.prog_offset;
+         ksp2 = brw->wm.base.prog_offset + prog_data->prog_offset_16;
+      } else {
+         dw4 |= (prog_data->dispatch_grf_start_reg_16 <<
                 GEN6_WM_DISPATCH_START_GRF_SHIFT_0);
+         ksp0 = brw->wm.base.prog_offset + prog_data->prog_offset_16;
+      }
    }
    else {
       dw5 |= GEN6_WM_8_DISPATCH_ENABLE;
-      dw4 |= (brw->wm.prog_data->base.dispatch_grf_start_reg <<
+      dw4 |= (prog_data->base.dispatch_grf_start_reg <<
               GEN6_WM_DISPATCH_START_GRF_SHIFT_0);
+      ksp0 = brw->wm.base.prog_offset;
    }
 
    /* CACHE_NEW_WM_PROG | _NEW_COLOR */
-   if (brw->wm.prog_data->dual_src_blend &&
+   if (prog_data->dual_src_blend &&
        (ctx->Color.BlendEnabled & 1) &&
        ctx->Color.Blend[0]._UsesDualSrc) {
       dw5 |= GEN6_WM_DUAL_SOURCE_BLEND_ENABLE;
@@ -209,14 +184,13 @@ upload_wm_state(struct brw_context *brw)
       dw5 |= GEN6_WM_USES_SOURCE_DEPTH | GEN6_WM_USES_SOURCE_W;
    if (fp->program.Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
       dw5 |= GEN6_WM_COMPUTED_DEPTH;
-   /* CACHE_NEW_WM_PROG */
-   dw6 |= brw->wm.prog_data->barycentric_interp_modes <<
+   dw6 |= prog_data->barycentric_interp_modes <<
       GEN6_WM_BARYCENTRIC_INTERPOLATION_MODE_SHIFT;
 
    /* _NEW_COLOR, _NEW_MULTISAMPLE */
    if (fp->program.UsesKill || ctx->Color.AlphaEnabled ||
        ctx->Multisample.SampleAlphaToCoverage ||
-       brw->wm.prog_data->uses_omask)
+       prog_data->uses_omask)
       dw5 |= GEN6_WM_KILL_ENABLE;
 
    /* _NEW_BUFFERS | _NEW_COLOR */
@@ -232,11 +206,10 @@ upload_wm_state(struct brw_context *brw)
     * Target Write messages. If present, the oMask data is used to mask off
     * samples."
     */
-    if(brw->wm.prog_data->uses_omask)
+    if (prog_data->uses_omask)
       dw5 |= GEN6_WM_OMASK_TO_RENDER_TARGET;
 
-   /* CACHE_NEW_WM_PROG */
-   dw6 |= brw->wm.prog_data->num_varying_inputs <<
+   dw6 |= prog_data->num_varying_inputs <<
       GEN6_WM_NUM_SF_OUTPUTS_SHIFT;
    if (multisampled_fbo) {
       /* _NEW_MULTISAMPLE */
@@ -298,22 +271,19 @@ upload_wm_state(struct brw_context *brw)
     * We only require XY sample offsets. So, this recommendation doesn't
     * look useful at the moment. We might need this in future.
     */
-   if (brw->wm.prog_data->uses_pos_offset)
+   if (prog_data->uses_pos_offset)
       dw6 |= GEN6_WM_POSOFFSET_SAMPLE;
    else
       dw6 |= GEN6_WM_POSOFFSET_NONE;
 
    BEGIN_BATCH(9);
    OUT_BATCH(_3DSTATE_WM << 16 | (9 - 2));
-   if (brw->wm.prog_data->prog_offset_16 && min_inv_per_frag > 1)
-      OUT_BATCH(brw->wm.base.prog_offset + brw->wm.prog_data->prog_offset_16);
-   else
-      OUT_BATCH(brw->wm.base.prog_offset);
+   OUT_BATCH(ksp0);
    OUT_BATCH(dw2);
-   if (brw->wm.prog_data->total_scratch) {
+   if (prog_data->base.total_scratch) {
       OUT_RELOC(brw->wm.base.scratch_bo,
                 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
-               ffs(brw->wm.prog_data->total_scratch) - 11);
+               ffs(prog_data->base.total_scratch) - 11);
    } else {
       OUT_BATCH(0);
    }
@@ -321,8 +291,7 @@ upload_wm_state(struct brw_context *brw)
    OUT_BATCH(dw5);
    OUT_BATCH(dw6);
    OUT_BATCH(0); /* kernel 1 pointer */
-   /* kernel 2 pointer */
-   OUT_BATCH(brw->wm.base.prog_offset + brw->wm.prog_data->prog_offset_16);
+   OUT_BATCH(ksp2);
    ADVANCE_BATCH();
 }