i965: Also do constant propagation for the second operand of CMP.

[mesa.git] / src / mesa / drivers / dri / i965 / gen6_wm_state.c

diff --git a/src/mesa/drivers/dri/i965/gen6_wm_state.c b/src/mesa/drivers/dri/i965/gen6_wm_state.c
index e3552617691c1ef23682a3a219bb5deaf4879e4c..d88c86a1b259d32e0711715ac266de7432e2ccc3 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen6_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_wm_state.c
@@ -29,10 +29,54 @@
 #include "brw_state.h"
 #include "brw_defines.h"
 #include "brw_util.h"
-#include "shader/prog_parameter.h"
-#include "shader/prog_statevars.h"
+#include "program/prog_parameter.h"
+#include "program/prog_statevars.h"
 #include "intel_batchbuffer.h"
 
+static void
+prepare_wm_constants(struct brw_context *brw)
+{
+   struct intel_context *intel = &brw->intel;
+   GLcontext *ctx = &intel->ctx;
+   const struct brw_fragment_program *fp =
+      brw_fragment_program_const(brw->fragment_program);
+
+   drm_intel_bo_unreference(brw->wm.push_const_bo);
+   brw->wm.push_const_bo = NULL;
+
+   /* Updates the ParamaterValues[i] pointers for all parameters of the
+    * basic type of PROGRAM_STATE_VAR.
+    */
+   /* XXX: Should this happen somewhere before to get our state flag set? */
+   _mesa_load_state_parameters(ctx, fp->program.Base.Parameters);
+
+   if (brw->wm.prog_data->nr_params != 0) {
+      float *constants;
+      unsigned int i;
+
+      brw->wm.push_const_bo = drm_intel_bo_alloc(intel->bufmgr,
+                                                "WM constant_bo",
+                                                brw->wm.prog_data->nr_params *
+                                                sizeof(float),
+                                                4096);
+      drm_intel_gem_bo_map_gtt(brw->wm.push_const_bo);
+      constants = brw->wm.push_const_bo->virtual;
+      for (i = 0; i < brw->wm.prog_data->nr_params; i++) {
+        constants[i] = *brw->wm.prog_data->param[i];
+      }
+      drm_intel_gem_bo_unmap_gtt(brw->wm.push_const_bo);
+   }
+}
+
+const struct brw_tracked_state gen6_wm_constants = {
+   .dirty = {
+      .mesa  = _NEW_PROGRAM_CONSTANTS,
+      .brw   = 0,
+      .cache = 0,
+   },
+   .prepare = prepare_wm_constants,
+};
+
 static void
 upload_wm_state(struct brw_context *brw)
 {
@@ -40,12 +84,9 @@ upload_wm_state(struct brw_context *brw)
    GLcontext *ctx = &intel->ctx;
    const struct brw_fragment_program *fp =
       brw_fragment_program_const(brw->fragment_program);
-   unsigned int nr_params = fp->program.Base.Parameters->NumParameters;
-   drm_intel_bo *constant_bo;
-   int i;
    uint32_t dw2, dw4, dw5, dw6;
 
-   if (fp->use_const_buffer || nr_params == 0) {
+   if (fp->use_const_buffer || brw->wm.prog_data->nr_params == 0) {
       /* Disable the push constant buffers. */
       BEGIN_BATCH(5);
       OUT_BATCH(CMD_3D_CONSTANT_PS_STATE << 16 | (5 - 2));
@@ -55,35 +96,17 @@ upload_wm_state(struct brw_context *brw)
       OUT_BATCH(0);
       ADVANCE_BATCH();
    } else {
-      /* Updates the ParamaterValues[i] pointers for all parameters of the
-       * basic type of PROGRAM_STATE_VAR.
-       */
-      _mesa_load_state_parameters(ctx, fp->program.Base.Parameters);
-
-      constant_bo = drm_intel_bo_alloc(intel->bufmgr, "WM constant_bo",
-                                      nr_params * 4 * sizeof(float),
-                                      4096);
-      intel_bo_map_gtt_preferred(intel, constant_bo, GL_TRUE);
-      for (i = 0; i < nr_params; i++) {
-        memcpy((char *)constant_bo->virtual + i * 4 * sizeof(float),
-               fp->program.Base.Parameters->ParameterValues[i],
-               4 * sizeof(float));
-      }
-      intel_bo_unmap_gtt_preferred(intel, constant_bo);
-
       BEGIN_BATCH(5);
       OUT_BATCH(CMD_3D_CONSTANT_PS_STATE << 16 |
                GEN6_CONSTANT_BUFFER_0_ENABLE |
                (5 - 2));
-      OUT_RELOC(constant_bo,
+      OUT_RELOC(brw->wm.push_const_bo,
                I915_GEM_DOMAIN_RENDER, 0, /* XXX: bad domain */
-               ALIGN(nr_params, 2) / 2 - 1);
+               ALIGN(brw->wm.prog_data->nr_params, 8) / 8 - 1);
       OUT_BATCH(0);
       OUT_BATCH(0);
       OUT_BATCH(0);
       ADVANCE_BATCH();
-
-      drm_intel_bo_unreference(constant_bo);
    }
 
    intel_batchbuffer_emit_mi_flush(intel->batch);
@@ -98,7 +121,8 @@ upload_wm_state(struct brw_context *brw)
 
    /* CACHE_NEW_SAMPLER */
    dw2 |= (ALIGN(brw->wm.sampler_count, 4) / 4) << GEN6_WM_SAMPLER_COUNT_SHIFT;
-   dw4 |= (1 << GEN6_WM_DISPATCH_START_GRF_SHIFT_0);
+   dw4 |= (brw->wm.prog_data->first_curbe_grf <<
+          GEN6_WM_DISPATCH_START_GRF_SHIFT_0);
 
    dw5 |= (40 - 1) << GEN6_WM_MAX_THREADS_SHIFT;
    dw5 |= GEN6_WM_DISPATCH_ENABLE;
@@ -127,8 +151,9 @@ upload_wm_state(struct brw_context *brw)
    if (fp->program.UsesKill || ctx->Color.AlphaEnabled)
       dw5 |= GEN6_WM_KILL_ENABLE;
 
-   /* This should probably be FS inputs read */
-   dw6 |= brw_count_bits(brw->vs.prog_data->outputs_written) <<
+   dw6 |= GEN6_WM_PERSPECTIVE_PIXEL_BARYCENTRIC;
+
+   dw6 |= brw_count_bits(brw->fragment_program->Base.InputsRead) <<
       GEN6_WM_NUM_SF_OUTPUTS_SHIFT;
 
    BEGIN_BATCH(9);