nir: Add a flag to lower_io to force "sample" interpolation

[mesa.git] / src / mesa / drivers / dri / i965 / gen7_cs_state.c

diff --git a/src/mesa/drivers/dri/i965/gen7_cs_state.c b/src/mesa/drivers/dri/i965/gen7_cs_state.c
index ff308e6f79064c231aad89dfe5e6696e1e0d3847..dded30f7a4a90b4180026b31f65f39d3882dbb35 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen7_cs_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_cs_state.c
@@ -32,6 +32,7 @@
 #include "brw_state.h"
 #include "program/prog_statevars.h"
 #include "compiler/glsl/ir_uniform.h"
+#include "main/shaderapi.h"
 
 static void
 brw_upload_cs_state(struct brw_context *brw)
@@ -45,10 +46,10 @@ brw_upload_cs_state(struct brw_context *brw)
    struct brw_stage_state *stage_state = &brw->cs.base;
    struct brw_cs_prog_data *cs_prog_data = brw->cs.prog_data;
    struct brw_stage_prog_data *prog_data = &cs_prog_data->base;
-   const struct brw_device_info *devinfo = brw->intelScreen->devinfo;
+   const struct gen_device_info *devinfo = brw->intelScreen->devinfo;
 
    if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
-      brw->vtbl.emit_buffer_surface_state(
+      brw_emit_buffer_surface_state(
          brw, &stage_state->surf_offset[
                  prog_data->binding_table.shader_time_start],
          brw->shader_time.bo, 0, BRW_SURFACEFORMAT_RAW,
@@ -66,25 +67,25 @@ brw_upload_cs_state(struct brw_context *brw)
    if (prog_data->total_scratch) {
       if (brw->gen >= 8) {
          /* Broadwell's Per Thread Scratch Space is in the range [0, 11]
-          * where 0 = 1k, 1 = 4k, 2 = 8k, ..., 11 = 2M.
+          * where 0 = 1k, 1 = 2k, 2 = 4k, ..., 11 = 2M.
           */
          OUT_RELOC64(stage_state->scratch_bo,
                      I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
-                     ffs(prog_data->total_scratch) - 11);
+                     ffs(stage_state->per_thread_scratch) - 11);
       } else if (brw->is_haswell) {
          /* Haswell's Per Thread Scratch Space is in the range [0, 10]
           * where 0 = 2k, 1 = 4k, 2 = 8k, ..., 10 = 2M.
           */
          OUT_RELOC(stage_state->scratch_bo,
                    I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
-                   ffs(prog_data->total_scratch) - 12);
+                   ffs(stage_state->per_thread_scratch) - 12);
       } else {
          /* Earlier platforms use the range [0, 11] to mean [1kB, 12kB]
           * where 0 = 1kB, 1 = 2kB, 2 = 3kB, ..., 11 = 12kB.
           */
          OUT_RELOC(stage_state->scratch_bo,
                    I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
-                   prog_data->total_scratch / 1024 - 1);
+                   stage_state->per_thread_scratch / 1024 - 1);
       }
    } else {
       OUT_BATCH(0);
@@ -286,6 +287,7 @@ gen7_upload_cs_push_constants(struct brw_context *brw)
       /* CACHE_NEW_CS_PROG */
       struct brw_cs_prog_data *cs_prog_data = brw->cs.prog_data;
 
+      _mesa_shader_write_subroutine_indices(&brw->ctx, MESA_SHADER_COMPUTE);
       brw_upload_cs_push_constants(brw, &cp->program.Base, cs_prog_data,
                                    stage_state, AUB_TRACE_WM_CONSTANTS);
    }
@@ -318,6 +320,7 @@ brw_upload_cs_pull_constants(struct brw_context *brw)
    /* BRW_NEW_CS_PROG_DATA */
    const struct brw_stage_prog_data *prog_data = &brw->cs.prog_data->base;
 
+   _mesa_shader_write_subroutine_indices(&brw->ctx, MESA_SHADER_COMPUTE);
    /* _NEW_PROGRAM_CONSTANTS */
    brw_upload_pull_constants(brw, BRW_NEW_SURFACES, &cp->program.Base,
                              stage_state, prog_data);