intel: Add a batch flush between front-buffer downsample and X protocol.

[mesa.git] / src / mesa / drivers / dri / i965 / gen7_disable.c

diff --git a/src/mesa/drivers/dri/i965/gen7_disable.c b/src/mesa/drivers/dri/i965/gen7_disable.c
index 4e9461739d0eadf0fc044887317d8d6193980034..c9564c696145759a37454b59fb227eeb9dcaf6f3 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen7_disable.c
+++ b/src/mesa/drivers/dri/i965/gen7_disable.c
@@ -29,9 +29,7 @@
 static void
 disable_stages(struct brw_context *brw)
 {
-   struct intel_context *intel = &brw->intel;
-
-   assert(brw->gs.prog_bo == NULL);
+   assert(!brw->gs.prog_active);
 
    /* Disable the Geometry Shader (GS) Unit */
    BEGIN_BATCH(7);
@@ -122,19 +120,12 @@ disable_stages(struct brw_context *brw)
    OUT_BATCH(_3DSTATE_BINDING_TABLE_POINTERS_DS << 16 | (2 - 2));
    OUT_BATCH(0);
    ADVANCE_BATCH();
-
-   /* Disable the SOL stage */
-   BEGIN_BATCH(3);
-   OUT_BATCH(_3DSTATE_STREAMOUT << 16 | (3 - 2));
-   OUT_BATCH(0);
-   OUT_BATCH(0);
-   ADVANCE_BATCH();
 }
 
 const struct brw_tracked_state gen7_disable_stages = {
    .dirty = {
       .mesa  = 0,
-      .brw   = BRW_NEW_BATCH,
+      .brw   = BRW_NEW_CONTEXT,
       .cache = 0,
    },
    .emit = disable_stages,