i965: Remove never used RSR and RSL opcodes.

[mesa.git] / src / mesa / drivers / dri / i965 / gen7_sf_state.c

diff --git a/src/mesa/drivers/dri/i965/gen7_sf_state.c b/src/mesa/drivers/dri/i965/gen7_sf_state.c
index d72ee02ccf537ca01c02cfbb3ea1e7f1f7c10166..0ff33888c79c0841cdd15545bd8ebc9af71cd825 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen7_sf_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_sf_state.c
@@ -32,8 +32,7 @@
 static void
 upload_sbe_state(struct brw_context *brw)
 {
-   struct intel_context *intel = &brw->intel;
-   struct gl_context *ctx = &intel->ctx;
+   struct gl_context *ctx = &brw->ctx;
    /* BRW_NEW_FRAGMENT_PROGRAM */
    uint32_t num_outputs = _mesa_bitcount_64(brw->fragment_program->Base.InputsRead);
    /* _NEW_LIGHT */
@@ -158,8 +157,7 @@ const struct brw_tracked_state gen7_sbe_state = {
 static void
 upload_sf_state(struct brw_context *brw)
 {
-   struct intel_context *intel = &brw->intel;
-   struct gl_context *ctx = &intel->ctx;
+   struct gl_context *ctx = &brw->ctx;
    uint32_t dw1, dw2, dw3;
    float point_size;
    /* _NEW_BUFFERS */
@@ -258,7 +256,7 @@ upload_sf_state(struct brw_context *brw)
       dw2 |= GEN6_SF_LINE_AA_ENABLE;
       dw2 |= GEN6_SF_LINE_END_CAP_WIDTH_1_0;
    }
-   if (ctx->Line.StippleFlag && intel->is_haswell) {
+   if (ctx->Line.StippleFlag && brw->is_haswell) {
       dw2 |= HSW_SF_LINE_STIPPLE_ENABLE;
    }
    /* _NEW_MULTISAMPLE */