i965/gen7: Enable HiZ

[mesa.git] / src / mesa / drivers / dri / i965 / gen7_sf_state.c

diff --git a/src/mesa/drivers/dri/i965/gen7_sf_state.c b/src/mesa/drivers/dri/i965/gen7_sf_state.c
index 90853181009326fde3cb26a06a4b3ce221eb4ca8..7691cb218d69807bcd0918ae495eca50575b0d14 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen7_sf_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_sf_state.c
@@ -111,8 +111,8 @@ upload_sbe_state(struct brw_context *brw)
                            ctx->VertexProgram._TwoSideEnabled);
    }
 
-   for (; attr < FRAG_ATTRIB_MAX; attr++)
-      attr_overrides[input_index++] = 0;
+   for (; input_index < FRAG_ATTRIB_MAX; input_index++)
+      attr_overrides[input_index] = 0;
 
    BEGIN_BATCH(14);
    OUT_BATCH(_3DSTATE_SBE << 16 | (14 - 2));
@@ -137,7 +137,8 @@ const struct brw_tracked_state gen7_sbe_state = {
                _NEW_PROGRAM |
                _NEW_TRANSFORM),
       .brw   = (BRW_NEW_CONTEXT |
-               BRW_NEW_FRAGMENT_PROGRAM),
+               BRW_NEW_FRAGMENT_PROGRAM |
+               BRW_NEW_HIZ),
       .cache = CACHE_NEW_VS_PROG
    },
    .emit = upload_sbe_state,
@@ -153,7 +154,17 @@ upload_sf_state(struct brw_context *brw)
    /* _NEW_BUFFERS */
    bool render_to_fbo = brw->intel.ctx.DrawBuffer->Name != 0;
 
-   dw1 = GEN6_SF_STATISTICS_ENABLE | GEN6_SF_VIEWPORT_TRANSFORM_ENABLE;
+   dw1 = GEN6_SF_STATISTICS_ENABLE;
+
+   /* Enable viewport transform only if no HiZ operation is progress
+    *
+    * From page 11 of the SandyBridge PRM, Volume 2, Part 1, Section 1.3, "3D
+    * Primitives Overview":
+    *     RECTLIST: Viewport Mapping must be DISABLED (as is typical with the
+    *     use of screen- space coordinates).
+    */
+   if (!brw->hiz.op)
+      dw1 |= GEN6_SF_VIEWPORT_TRANSFORM_ENABLE;
 
    /* _NEW_BUFFERS */
    dw1 |= (brw_depthbuffer_format(brw) << GEN7_SF_DEPTH_BUFFER_SURFACE_FORMAT_SHIFT);
@@ -287,7 +298,8 @@ const struct brw_tracked_state gen7_sf_state = {
                _NEW_SCISSOR |
                _NEW_BUFFERS |
                _NEW_POINT),
-      .brw   = (BRW_NEW_CONTEXT),
+      .brw   = (BRW_NEW_CONTEXT |
+               BRW_NEW_HIZ),
       .cache = CACHE_NEW_VS_PROG
    },
    .emit = upload_sf_state,