i965/fs: Add support for translating ir_triop_fma into MAD.

[mesa.git] / src / mesa / drivers / dri / i965 / gen7_sol_state.c

diff --git a/src/mesa/drivers/dri/i965/gen7_sol_state.c b/src/mesa/drivers/dri/i965/gen7_sol_state.c
index f5703362968587d9d47397a029cdaacfcc499324..fc69bfc261eecdee3f8b91e44d415d14ec043ee9 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen7_sol_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_sol_state.c
@@ -38,8 +38,7 @@
 static void
 upload_3dstate_so_buffers(struct brw_context *brw)
 {
-   struct intel_context *intel = &brw->intel;
-   struct gl_context *ctx = &intel->ctx;
+   struct gl_context *ctx = &brw->ctx;
    /* BRW_NEW_VERTEX_PROGRAM */
    const struct gl_shader_program *vs_prog =
       ctx->Shader.CurrentVertexProgram;
@@ -74,7 +73,7 @@ upload_3dstate_so_buffers(struct brw_context *brw)
         continue;
       }
 
-      bo = intel_bufferobj_buffer(intel, bufferobj, INTEL_WRITE_PART);
+      bo = intel_bufferobj_buffer(brw, bufferobj, INTEL_WRITE_PART);
       stride = linked_xfb_info->BufferStride[i] * 4;
 
       start = xfb_obj->Offset[i];
@@ -82,15 +81,6 @@ upload_3dstate_so_buffers(struct brw_context *brw)
       end = ALIGN(start + xfb_obj->Size[i], 4);
       assert(end <= bo->size);
 
-      /* If we don't have hardware contexts, then we reset our offsets at the
-       * start of every batch, so we track the number of vertices written in
-       * software and increment our pointers by that many.
-       */
-      if (!intel->hw_ctx) {
-         start += brw->sol.offset_0_batch_start * stride;
-         assert(start <= end);
-      }
-
       BEGIN_BATCH(4);
       OUT_BATCH(_3DSTATE_SO_BUFFER << 16 | (4 - 2));
       OUT_BATCH((i << SO_BUFFER_INDEX_SHIFT) | stride);
@@ -107,12 +97,11 @@ upload_3dstate_so_buffers(struct brw_context *brw)
  * stream.  We only have one stream of rendering coming out of the GS unit, so
  * we only emit stream 0 (low 16 bits) SO_DECLs.
  */
-static void
-upload_3dstate_so_decl_list(struct brw_context *brw,
-                           const struct brw_vue_map *vue_map)
+void
+gen7_upload_3dstate_so_decl_list(struct brw_context *brw,
+                                 const struct brw_vue_map *vue_map)
 {
-   struct intel_context *intel = &brw->intel;
-   struct gl_context *ctx = &intel->ctx;
+   struct gl_context *ctx = &brw->ctx;
    /* BRW_NEW_VERTEX_PROGRAM */
    const struct gl_shader_program *vs_prog =
       ctx->Shader.CurrentVertexProgram;
@@ -187,18 +176,13 @@ static void
 upload_3dstate_streamout(struct brw_context *brw, bool active,
                         const struct brw_vue_map *vue_map)
 {
-   struct intel_context *intel = &brw->intel;
-   struct gl_context *ctx = &intel->ctx;
+   struct gl_context *ctx = &brw->ctx;
    /* BRW_NEW_TRANSFORM_FEEDBACK */
    struct gl_transform_feedback_object *xfb_obj =
       ctx->TransformFeedback.CurrentObject;
    uint32_t dw1 = 0, dw2 = 0;
    int i;
 
-   /* BRW_NEW_RASTERIZER_DISCARD */
-   if (ctx->RasterDiscard)
-      dw1 |= SO_RENDERING_DISABLE;
-
    if (active) {
       int urb_entry_read_offset = 0;
       int urb_entry_read_length = (vue_map->num_slots + 1) / 2 -
@@ -236,21 +220,14 @@ upload_3dstate_streamout(struct brw_context *brw, bool active,
 static void
 upload_sol_state(struct brw_context *brw)
 {
-   struct intel_context *intel = &brw->intel;
-   struct gl_context *ctx = &intel->ctx;
+   struct gl_context *ctx = &brw->ctx;
    /* BRW_NEW_TRANSFORM_FEEDBACK */
    bool active = _mesa_is_xfb_active_and_unpaused(ctx);
 
    if (active) {
       upload_3dstate_so_buffers(brw);
       /* BRW_NEW_VUE_MAP_GEOM_OUT */
-      upload_3dstate_so_decl_list(brw, &brw->vue_map_geom_out);
-
-      /* If we don't have hardware contexts, then some other client may have
-       * changed the SO write offsets, and we need to rewrite them.
-       */
-      if (!intel->hw_ctx)
-         intel->batch.needs_sol_reset = true;
+      gen7_upload_3dstate_so_decl_list(brw, &brw->vue_map_geom_out);
    }
 
    /* Finally, set up the SOL stage.  This command must always follow updates to
@@ -267,12 +244,21 @@ const struct brw_tracked_state gen7_sol_state = {
       .brw   = (BRW_NEW_BATCH |
                BRW_NEW_VERTEX_PROGRAM |
                 BRW_NEW_VUE_MAP_GEOM_OUT |
-                BRW_NEW_TRANSFORM_FEEDBACK |
-                BRW_NEW_RASTERIZER_DISCARD)
+                BRW_NEW_TRANSFORM_FEEDBACK)
    },
    .emit = upload_sol_state,
 };
 
+void
+gen7_begin_transform_feedback(struct gl_context *ctx, GLenum mode,
+                              struct gl_transform_feedback_object *obj)
+{
+   struct brw_context *brw = brw_context(ctx);
+
+   intel_batchbuffer_flush(brw);
+   brw->batch.needs_sol_reset = true;
+}
+
 void
 gen7_end_transform_feedback(struct gl_context *ctx,
                            struct gl_transform_feedback_object *obj)
@@ -284,7 +270,6 @@ gen7_end_transform_feedback(struct gl_context *ctx,
     * This also covers any cache flushing required.
     */
    struct brw_context *brw = brw_context(ctx);
-   struct intel_context *intel = &brw->intel;
 
-   intel_batchbuffer_flush(intel);
+   intel_batchbuffer_flush(brw);
 }