mesa: add/update comments in _mesa_copy_buffer_subdata()

[mesa.git] / src / mesa / drivers / dri / i965 / gen7_urb.c

diff --git a/src/mesa/drivers/dri/i965/gen7_urb.c b/src/mesa/drivers/dri/i965/gen7_urb.c
index 3a614693dfc892fb9da2419b5b54deca4f657d9c..e53fcb77356dc5e57638db2b084d8f8d9e4ae81b 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen7_urb.c
+++ b/src/mesa/drivers/dri/i965/gen7_urb.c
@@ -51,8 +51,9 @@
  * See "Volume 2a: 3D Pipeline," section 1.8.
  */
 static void
-prepare_urb(struct brw_context *brw)
+gen7_upload_urb(struct brw_context *brw)
 {
+   struct intel_context *intel = &brw->intel;
    /* Total space for entries is URB size - 16kB for push constants */
    int handle_region_size = (brw->urb.size - 16) * 1024; /* bytes */
 
@@ -68,17 +69,11 @@ prepare_urb(struct brw_context *brw)
 
    /* URB Starting Addresses are specified in multiples of 8kB. */
    brw->urb.vs_start = 2; /* skip over push constants */
-}
-
-static void
-upload_urb(struct brw_context *brw)
-{
-   struct intel_context *intel = &brw->intel;
 
    assert(brw->urb.nr_vs_entries % 8 == 0);
    assert(brw->urb.nr_gs_entries % 8 == 0);
    /* GS requirement */
-   assert(!brw->gs.prog_bo);
+   assert(!brw->gs.prog_active);
 
    BEGIN_BATCH(2);
    OUT_BATCH(_3DSTATE_PUSH_CONSTANT_ALLOC_VS << 16 | (2 - 2));
@@ -123,6 +118,5 @@ const struct brw_tracked_state gen7_urb = {
       .brw = BRW_NEW_CONTEXT,
       .cache = (CACHE_NEW_VS_PROG | CACHE_NEW_GS_PROG),
    },
-   .prepare = prepare_urb,
-   .emit = upload_urb,
+   .emit = gen7_upload_urb,
 };