i965/skl: Break down SIMD16 3-source instructions when required.

[mesa.git] / src / mesa / drivers / dri / i965 / gen8_blend_state.c

diff --git a/src/mesa/drivers/dri/i965/gen8_blend_state.c b/src/mesa/drivers/dri/i965/gen8_blend_state.c
index a02b765c06b290cd52e356c0a5aeebc3bd5f75fe..786c79ad44d869baa88d9fa2651404b25d271c20 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen8_blend_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_blend_state.c
@@ -199,9 +199,11 @@ gen8_upload_blend_state(struct brw_context *brw)
 
 const struct brw_tracked_state gen8_blend_state = {
    .dirty = {
-      .mesa = _NEW_COLOR | _NEW_BUFFERS | _NEW_MULTISAMPLE,
-      .brw = BRW_NEW_BATCH | BRW_NEW_STATE_BASE_ADDRESS,
-      .cache = 0,
+      .mesa = _NEW_BUFFERS |
+              _NEW_COLOR |
+              _NEW_MULTISAMPLE,
+      .brw = BRW_NEW_BATCH |
+             BRW_NEW_STATE_BASE_ADDRESS,
    },
    .emit = gen8_upload_blend_state,
 };
@@ -215,7 +217,7 @@ gen8_upload_ps_blend(struct brw_context *brw)
    /* _NEW_BUFFERS */
    struct gl_renderbuffer *rb = ctx->DrawBuffer->_ColorDrawBuffers[0];
 
-   /* _NEW_BUFFERS | _NEW_COLOR */
+   /* BRW_NEW_FRAGMENT_PROGRAM | _NEW_BUFFERS | _NEW_COLOR */
    if (brw_color_buffer_write_enabled(brw))
       dw1 |= GEN8_PS_BLEND_HAS_WRITEABLE_RT;
 
@@ -289,9 +291,11 @@ gen8_upload_ps_blend(struct brw_context *brw)
 
 const struct brw_tracked_state gen8_ps_blend = {
    .dirty = {
-      .mesa = _NEW_BUFFERS | _NEW_COLOR | _NEW_MULTISAMPLE,
-      .brw = BRW_NEW_CONTEXT,
-      .cache = 0,
+      .mesa = _NEW_BUFFERS |
+              _NEW_COLOR |
+              _NEW_MULTISAMPLE,
+      .brw = BRW_NEW_CONTEXT |
+             BRW_NEW_FRAGMENT_PROGRAM,
    },
    .emit = gen8_upload_ps_blend
 };