const struct brw_blorp_params *params)
{
const struct brw_blorp_prog_data *prog_data = params->wm_prog_data;
- uint32_t dw3, dw5, dw6, dw7;
+ uint32_t dw3, dw5, dw6, dw7, ksp0, ksp2;
- dw3 = dw5 = dw6 = dw7 = 0;
+ dw3 = dw5 = dw6 = dw7 = ksp0 = ksp2 = 0;
dw3 |= GEN7_PS_VECTOR_MASK_ENABLE;
- dw6 |= GEN7_PS_16_DISPATCH_ENABLE;
-
if (params->src.mt) {
dw3 |= 1 << GEN7_PS_SAMPLER_COUNT_SHIFT; /* Up to 4 samplers */
dw3 |= 2 << GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT; /* Two surfaces */
}
dw6 |= GEN7_PS_PUSH_CONSTANT_ENABLE;
- dw7 |= prog_data->first_curbe_grf << GEN7_PS_DISPATCH_START_GRF_SHIFT_0;
+ dw7 |= prog_data->first_curbe_grf_0 << GEN7_PS_DISPATCH_START_GRF_SHIFT_0;
+ dw7 |= prog_data->first_curbe_grf_2 << GEN7_PS_DISPATCH_START_GRF_SHIFT_2;
+
+ if (params->wm_prog_data->dispatch_8)
+ dw6 |= GEN7_PS_8_DISPATCH_ENABLE;
+ if (params->wm_prog_data->dispatch_16)
+ dw6 |= GEN7_PS_16_DISPATCH_ENABLE;
+
+ ksp0 = params->wm_prog_kernel;
+ ksp2 = params->wm_prog_kernel + params->wm_prog_data->ksp_offset_2;
/* 3DSTATE_PS expects the number of threads per PSD, which is always 64;
* it implicitly scales for different GT levels (which have some # of PSDs).
BEGIN_BATCH(12);
OUT_BATCH(_3DSTATE_PS << 16 | (12 - 2));
- OUT_BATCH(params->wm_prog_kernel);
+ OUT_BATCH(ksp0);
OUT_BATCH(0);
OUT_BATCH(dw3);
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(dw6);
OUT_BATCH(dw7);
+ OUT_BATCH(0); /* kernel 1 pointer */
OUT_BATCH(0);
- OUT_BATCH(0);
- OUT_BATCH(0);
+ OUT_BATCH(ksp2);
OUT_BATCH(0);
ADVANCE_BATCH();
}
{
uint32_t wm_bind_bo_offset = 0;
- if (gen8_state_base_address.dirty.brw & brw->ctx.NewDriverState)
- gen8_upload_state_base_address(brw);
+ brw_upload_state_base_address(brw);
gen7_blorp_emit_cc_viewport(brw);
gen7_l3_state.emit(brw);