i965: Use MESA_FORMAT_B8G8R8X8_SRGB for RGB visuals

[mesa.git] / src / mesa / drivers / dri / i965 / gen8_misc_state.c

diff --git a/src/mesa/drivers/dri/i965/gen8_misc_state.c b/src/mesa/drivers/dri/i965/gen8_misc_state.c
index bd1d5cca611e349bdac449e8e35ed2e8ee770ec6..a46b252277ec61f2a25a2d075a1c6c9d6c759db6 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen8_misc_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_misc_state.c
@@ -29,7 +29,8 @@
 /**
  * Define the base addresses which some state is referenced from.
  */
-static void upload_state_base_address(struct brw_context *brw)
+static void
+gen8_upload_state_base_address(struct brw_context *brw)
 {
    uint32_t mocs_wb = brw->gen >= 9 ? SKL_MOCS_WB : BDW_MOCS_WB;
    int pkt_len = brw->gen >= 9 ? 19 : 16;
@@ -69,7 +70,7 @@ static void upload_state_base_address(struct brw_context *brw)
    }
    ADVANCE_BATCH();
 
-   brw->state.dirty.brw |= BRW_NEW_STATE_BASE_ADDRESS;
+   brw->ctx.NewDriverState |= BRW_NEW_STATE_BASE_ADDRESS;
 }
 
 const struct brw_tracked_state gen8_state_base_address = {
@@ -78,5 +79,5 @@ const struct brw_tracked_state gen8_state_base_address = {
       .brw = BRW_NEW_BATCH |
              BRW_NEW_PROGRAM_CACHE,
    },
-   .emit = upload_state_base_address
+   .emit = gen8_upload_state_base_address
 };