i965/nir/vec4: Prepare source and destination registers for ALU operations

[mesa.git] / src / mesa / drivers / dri / i965 / gen8_multisample_state.c

diff --git a/src/mesa/drivers/dri/i965/gen8_multisample_state.c b/src/mesa/drivers/dri/i965/gen8_multisample_state.c
index ff75df6e6edca9f5f9207fbffe7c0337313c3764..75cbe06c52232c20da358823d8e8840004b3f656 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen8_multisample_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_multisample_state.c
@@ -85,7 +85,6 @@ const struct brw_tracked_state gen8_multisample_state = {
       .mesa = _NEW_MULTISAMPLE,
       .brw = BRW_NEW_CONTEXT |
              BRW_NEW_NUM_SAMPLES,
-      .cache = 0
    },
    .emit = upload_multisample_state
 };