i965/nir/vec4: Prepare source and destination registers for ALU operations

[mesa.git] / src / mesa / drivers / dri / i965 / gen8_sol_state.c

diff --git a/src/mesa/drivers/dri/i965/gen8_sol_state.c b/src/mesa/drivers/dri/i965/gen8_sol_state.c
index 555adcbb2570acc36921973548cbf4a43c87ca62..58ead68e90c55af2b2463e722d29b273758970a8 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen8_sol_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_sol_state.c
@@ -125,8 +125,17 @@ gen8_upload_3dstate_streamout(struct brw_context *brw, bool active,
        * point by reading less and offsetting the register index in the
        * SO_DECLs.
        */
-      dw2 |= urb_entry_read_offset << SO_STREAM_0_VERTEX_READ_OFFSET_SHIFT;
-      dw2 |= (urb_entry_read_length - 1) << SO_STREAM_0_VERTEX_READ_LENGTH_SHIFT;
+      dw2 |= SET_FIELD(urb_entry_read_offset, SO_STREAM_0_VERTEX_READ_OFFSET);
+      dw2 |= SET_FIELD(urb_entry_read_length - 1, SO_STREAM_0_VERTEX_READ_LENGTH);
+
+      dw2 |= SET_FIELD(urb_entry_read_offset, SO_STREAM_1_VERTEX_READ_OFFSET);
+      dw2 |= SET_FIELD(urb_entry_read_length - 1, SO_STREAM_1_VERTEX_READ_LENGTH);
+
+      dw2 |= SET_FIELD(urb_entry_read_offset, SO_STREAM_2_VERTEX_READ_OFFSET);
+      dw2 |= SET_FIELD(urb_entry_read_length - 1, SO_STREAM_2_VERTEX_READ_LENGTH);
+
+      dw2 |= SET_FIELD(urb_entry_read_offset, SO_STREAM_3_VERTEX_READ_OFFSET);
+      dw2 |= SET_FIELD(urb_entry_read_length - 1, SO_STREAM_3_VERTEX_READ_LENGTH);
 
       /* Set buffer pitches; 0 means unbound. */
       if (xfb_obj->Buffers[0])
@@ -170,7 +179,6 @@ const struct brw_tracked_state gen8_sol_state = {
       .brw   = BRW_NEW_BATCH |
                BRW_NEW_TRANSFORM_FEEDBACK |
                BRW_NEW_VUE_MAP_GEOM_OUT,
-      .cache = 0,
    },
    .emit = upload_sol_state,
 };