i965/miptree: Replace is_lossless_compressed with mt->aux_usage checks
[mesa.git] / src / mesa / drivers / dri / i965 / gen8_surface_state.c
index 1f86557620d105423b1cb03816c0032135cb548a..c2ac7c74a61d68bc2064018f5a8e81f90d72a782 100644 (file)
 #include "isl/isl.h"
 
 static uint32_t *
-gen8_allocate_surface_state(struct brw_context *brw,
-                            uint32_t *out_offset, int index)
+gen8_allocate_surface_state(struct brw_context *brw, uint32_t *out_offset)
 {
-   int dwords = brw->gen >= 9 ? 16 : 13;
-   uint32_t *surf = __brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
-                                      dwords * 4, 64, index, out_offset);
-   memset(surf, 0, dwords * 4);
+   uint32_t *surf = brw_state_batch(brw, 64, 64, out_offset);
+   memset(surf, 0, 64);
    return surf;
 }
 
@@ -68,10 +65,10 @@ gen8_emit_null_surface_state(struct brw_context *brw,
                              unsigned samples,
                              uint32_t *out_offset)
 {
-   uint32_t *surf = gen8_allocate_surface_state(brw, out_offset, -1);
+   uint32_t *surf = gen8_allocate_surface_state(brw, out_offset);
 
    surf[0] = BRW_SURFACE_NULL << BRW_SURFACE_TYPE_SHIFT |
-             BRW_SURFACEFORMAT_B8G8R8A8_UNORM << BRW_SURFACE_FORMAT_SHIFT |
+             ISL_FORMAT_B8G8R8A8_UNORM << BRW_SURFACE_FORMAT_SHIFT |
              GEN8_SURFACE_TILING_Y;
    surf[2] = SET_FIELD(width - 1, GEN7_SURFACE_WIDTH) |
              SET_FIELD(height - 1, GEN7_SURFACE_HEIGHT);
@@ -80,7 +77,6 @@ gen8_emit_null_surface_state(struct brw_context *brw,
 void
 gen8_init_vtable_surface_functions(struct brw_context *brw)
 {
-   brw->vtbl.update_texture_surface = brw_update_texture_surface;
    brw->vtbl.update_renderbuffer_surface = brw_update_renderbuffer_surface;
    brw->vtbl.emit_null_surface_state = gen8_emit_null_surface_state;
 }