intel: Add a new "common" library for more code sharing
[mesa.git] / src / mesa / drivers / dri / i965 / gen8_vs_state.c
index 8b5048bee7e0e200c560c3d7660a0496b77737c1..b7682b553b49bc8b0e6c9c63248e97e5cb12e593 100644 (file)
@@ -53,14 +53,12 @@ upload_vs_state(struct brw_context *brw)
              ((ALIGN(stage_state->sampler_count, 4) / 4) <<
                GEN6_VS_SAMPLER_COUNT_SHIFT) |
              ((prog_data->base.binding_table.size_bytes / 4) <<
-               GEN6_VS_BINDING_TABLE_ENTRY_COUNT_SHIFT) |
-             (prog_data->base.nr_image_params ?
-              HSW_VS_UAV_ACCESS_ENABLE : 0));
+               GEN6_VS_BINDING_TABLE_ENTRY_COUNT_SHIFT));
 
    if (prog_data->base.total_scratch) {
       OUT_RELOC64(stage_state->scratch_bo,
                   I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
-                  ffs(prog_data->base.total_scratch) - 11);
+                  ffs(stage_state->per_thread_scratch) - 11);
    } else {
       OUT_BATCH(0);
       OUT_BATCH(0);
@@ -79,7 +77,8 @@ upload_vs_state(struct brw_context *brw)
              GEN6_VS_ENABLE);
 
    /* _NEW_TRANSFORM */
-   OUT_BATCH((ctx->Transform.ClipPlanesEnabled <<
+   OUT_BATCH(prog_data->cull_distance_mask |
+             (ctx->Transform.ClipPlanesEnabled <<
               GEN8_VS_USER_CLIP_DISTANCE_SHIFT));
    ADVANCE_BATCH();
 }
@@ -88,6 +87,7 @@ const struct brw_tracked_state gen8_vs_state = {
    .dirty = {
       .mesa  = _NEW_TRANSFORM,
       .brw   = BRW_NEW_BATCH |
+               BRW_NEW_BLORP |
                BRW_NEW_CONTEXT |
                BRW_NEW_VS_PROG_DATA,
    },