i965/urb: fixes division by zero
[mesa.git] / src / mesa / drivers / dri / i965 / gen8_vs_state.c
index 9bfde38c430c4b7f9aec0a7f19f60b435cab8458..d4a345583d68e91cc372469d915053290bd678eb 100644 (file)
@@ -39,6 +39,9 @@ upload_vs_state(struct brw_context *brw)
    /* BRW_NEW_VS_PROG_DATA */
    const struct brw_vue_prog_data *prog_data = &brw->vs.prog_data->base;
 
+   assert(prog_data->dispatch_mode == DISPATCH_MODE_SIMD8 ||
+          prog_data->dispatch_mode == DISPATCH_MODE_4X2_DUAL_OBJECT);
+
    if (prog_data->base.use_alt_mode)
       floating_point_mode = GEN6_VS_FLOATING_POINT_MODE_ALT;
 
@@ -74,7 +77,8 @@ upload_vs_state(struct brw_context *brw)
              GEN6_VS_ENABLE);
 
    /* _NEW_TRANSFORM */
-   OUT_BATCH((ctx->Transform.ClipPlanesEnabled <<
+   OUT_BATCH(prog_data->cull_distance_mask |
+             (ctx->Transform.ClipPlanesEnabled <<
               GEN8_VS_USER_CLIP_DISTANCE_SHIFT));
    ADVANCE_BATCH();
 }
@@ -83,6 +87,7 @@ const struct brw_tracked_state gen8_vs_state = {
    .dirty = {
       .mesa  = _NEW_TRANSFORM,
       .brw   = BRW_NEW_BATCH |
+               BRW_NEW_BLORP |
                BRW_NEW_CONTEXT |
                BRW_NEW_VS_PROG_DATA,
    },