i965: Add more precise cache tracking helpers

[mesa.git] / src / mesa / drivers / dri / i965 / genX_blorp_exec.c

diff --git a/src/mesa/drivers/dri/i965/genX_blorp_exec.c b/src/mesa/drivers/dri/i965/genX_blorp_exec.c
index 3bf6fd6156740201c6163fce8bd5db2618f89d36..2616f759ac6c90bbbb2547b37a3649fc48f4867c 100644 (file)
--- a/src/mesa/drivers/dri/i965/genX_blorp_exec.c
+++ b/src/mesa/drivers/dri/i965/genX_blorp_exec.c
@@ -225,7 +225,8 @@ genX(blorp_exec)(struct blorp_batch *batch,
     * data.
     */
    if (params->src.enabled)
-      brw_render_cache_set_check_flush(brw, params->src.addr.buffer);
+      brw_cache_flush_for_read(brw, params->src.addr.buffer);
+   brw_cache_flush_for_render(brw, params->dst.addr.buffer);
    brw_render_cache_set_check_flush(brw, params->dst.addr.buffer);
 
    brw_select_pipeline(brw, BRW_RENDER_PIPELINE);
@@ -293,9 +294,9 @@ retry:
    brw->ib.index_size = -1;
 
    if (params->dst.enabled)
-      brw_render_cache_set_add_bo(brw, params->dst.addr.buffer);
+      brw_render_cache_add_bo(brw, params->dst.addr.buffer);
    if (params->depth.enabled)
-      brw_render_cache_set_add_bo(brw, params->depth.addr.buffer);
+      brw_depth_cache_add_bo(brw, params->depth.addr.buffer);
    if (params->stencil.enabled)
-      brw_render_cache_set_add_bo(brw, params->stencil.addr.buffer);
+      brw_depth_cache_add_bo(brw, params->stencil.addr.buffer);
 }