i965/eu: Take into account the target cache argument in brw_set_dp_read_message.
[mesa.git] / src / mesa / drivers / dri / i965 / intel_asm_annotation.h
index 50ed21a3f7b385b325d42a9ebab50efc53fa5f1a..5faf6c69d46322c277ede23ffa6f52cfa1958144 100644 (file)
 extern "C" {
 #endif
 
-struct bblock_t;
-struct brw_context;
-struct gl_program;
+struct backend_instruction;
+struct cfg_t;
 
 struct annotation {
    int offset;
 
+   size_t error_length;
+   char *error;
+
    /* Pointers to the basic block in the CFG if the instruction group starts
     * or ends a basic block.
     */
@@ -58,7 +60,18 @@ struct annotation_info {
 
 void
 dump_assembly(void *assembly, int num_annotations, struct annotation *annotation,
-              struct brw_context *brw, const struct gl_program *prog);
+              const struct brw_device_info *devinfo);
+
+void
+annotate(const struct brw_device_info *devinfo,
+         struct annotation_info *annotation, const struct cfg_t *cfg,
+         struct backend_instruction *inst, unsigned offset);
+void
+annotation_finalize(struct annotation_info *annotation, unsigned offset);
+
+void
+annotation_insert_error(struct annotation_info *annotation, unsigned offset,
+                        const char *error);
 
 #ifdef __cplusplus
 } /* extern "C" */