i965: Alphabetize brw_tracked_state flags and use a consistent style.
[mesa.git] / src / mesa / drivers / dri / i965 / intel_blit.c
index 330bac44a5a197dc8119ba08452785c7a55a69ce..73ab488f00df919fda61e58425744a8ee12346b2 100644 (file)
@@ -1,6 +1,6 @@
 /**************************************************************************
  *
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * Copyright 2003 VMware, Inc.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
@@ -18,7 +18,7 @@
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
@@ -38,7 +38,6 @@
 #include "intel_buffers.h"
 #include "intel_fbo.h"
 #include "intel_reg.h"
-#include "intel_regions.h"
 #include "intel_batchbuffer.h"
 #include "intel_mipmap_tree.h"
 
@@ -86,8 +85,7 @@ br13_for_cpp(int cpp)
       return BR13_8;
       break;
    default:
-      assert(0);
-      return 0;
+      unreachable("not reached");
    }
 }
 
@@ -158,12 +156,16 @@ intel_miptree_blit(struct brw_context *brw,
                    uint32_t width, uint32_t height,
                    GLenum logicop)
 {
+   /* The blitter doesn't understand multisampling at all. */
+   if (src_mt->num_samples > 0 || dst_mt->num_samples > 0)
+      return false;
+
    /* No sRGB decode or encode is done by the hardware blitter, which is
     * consistent with what we want in the callers (glCopyTexSubImage(),
     * glBlitFramebuffer(), texture validation, etc.).
     */
-   gl_format src_format = _mesa_get_srgb_format_linear(src_mt->format);
-   gl_format dst_format = _mesa_get_srgb_format_linear(dst_mt->format);
+   mesa_format src_format = _mesa_get_srgb_format_linear(src_mt->format);
+   mesa_format dst_format = _mesa_get_srgb_format_linear(dst_mt->format);
 
    /* The blitter doesn't support doing any format conversions.  We do also
     * support blitting ARGB8888 to XRGB8888 (trivial, the values dropped into
@@ -171,10 +173,10 @@ intel_miptree_blit(struct brw_context *brw,
     * channel to 1.0 at the end.
     */
    if (src_format != dst_format &&
-      ((src_format != MESA_FORMAT_ARGB8888 &&
-        src_format != MESA_FORMAT_XRGB8888) ||
-       (dst_format != MESA_FORMAT_ARGB8888 &&
-        dst_format != MESA_FORMAT_XRGB8888))) {
+      ((src_format != MESA_FORMAT_B8G8R8A8_UNORM &&
+        src_format != MESA_FORMAT_B8G8R8X8_UNORM) ||
+       (dst_format != MESA_FORMAT_B8G8R8A8_UNORM &&
+        dst_format != MESA_FORMAT_B8G8R8X8_UNORM))) {
       perf_debug("%s: Can't use hardware blitter from %s to %s, "
                  "falling back.\n", __FUNCTION__,
                  _mesa_get_format_name(src_format),
@@ -198,11 +200,11 @@ intel_miptree_blit(struct brw_context *brw,
     * pitches < 32k.
     *
     * As a result of these two limitations, we can only use the blitter to do
-    * this copy when the region's pitch is less than 32k.
+    * this copy when the miptree's pitch is less than 32k.
     */
-   if (src_mt->region->pitch > 32768 ||
-       dst_mt->region->pitch > 32768) {
-      perf_debug("Falling back due to >32k pitch\n");
+   if (src_mt->pitch >= 32768 ||
+       dst_mt->pitch >= 32768) {
+      perf_debug("Falling back due to >=32k pitch\n");
       return false;
    }
 
@@ -215,12 +217,12 @@ intel_miptree_blit(struct brw_context *brw,
    intel_miptree_resolve_color(brw, dst_mt);
 
    if (src_flip)
-      src_y = src_mt->level[src_level].height - src_y - height;
+      src_y = minify(src_mt->physical_height0, src_level - src_mt->first_level) - src_y - height;
 
    if (dst_flip)
-      dst_y = dst_mt->level[dst_level].height - dst_y - height;
+      dst_y = minify(dst_mt->physical_height0, dst_level - dst_mt->first_level) - dst_y - height;
 
-   int src_pitch = src_mt->region->pitch;
+   int src_pitch = src_mt->pitch;
    if (src_flip != dst_flip)
       src_pitch = -src_pitch;
 
@@ -259,11 +261,11 @@ intel_miptree_blit(struct brw_context *brw,
    if (!intelEmitCopyBlit(brw,
                           src_mt->cpp,
                           src_pitch,
-                          src_mt->region->bo, src_mt->offset,
-                          src_mt->region->tiling,
-                          dst_mt->region->pitch,
-                          dst_mt->region->bo, dst_mt->offset,
-                          dst_mt->region->tiling,
+                          src_mt->bo, src_mt->offset,
+                          src_mt->tiling,
+                          dst_mt->pitch,
+                          dst_mt->bo, dst_mt->offset,
+                          dst_mt->tiling,
                           src_x, src_y,
                           dst_x, dst_y,
                           width, height,
@@ -271,8 +273,8 @@ intel_miptree_blit(struct brw_context *brw,
       return false;
    }
 
-   if (src_mt->format == MESA_FORMAT_XRGB8888 &&
-       dst_mt->format == MESA_FORMAT_ARGB8888) {
+   if (src_mt->format == MESA_FORMAT_B8G8R8X8_UNORM &&
+       dst_mt->format == MESA_FORMAT_B8G8R8A8_UNORM) {
       intel_miptree_set_alpha_to_one(brw, dst_mt,
                                      dst_x, dst_y,
                                      width, height);
@@ -397,18 +399,33 @@ intelEmitCopyBlit(struct brw_context *brw,
    assert(dst_offset + (dst_y + h - 1) * abs(dst_pitch) +
           (w * cpp) <= dst_buffer->size);
 
-   BEGIN_BATCH_BLT_TILED(8, dst_y_tiled, src_y_tiled);
+   unsigned length = brw->gen >= 8 ? 10 : 8;
 
-   OUT_BATCH(CMD | (8 - 2));
+   BEGIN_BATCH_BLT_TILED(length, dst_y_tiled, src_y_tiled);
+   OUT_BATCH(CMD | (length - 2));
    OUT_BATCH(BR13 | (uint16_t)dst_pitch);
    OUT_BATCH(SET_FIELD(dst_y, BLT_Y) | SET_FIELD(dst_x, BLT_X));
    OUT_BATCH(SET_FIELD(dst_y2, BLT_Y) | SET_FIELD(dst_x2, BLT_X));
-   OUT_RELOC(dst_buffer,
-             I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
-             dst_offset);
+   if (brw->gen >= 8) {
+      OUT_RELOC64(dst_buffer,
+                  I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+                  dst_offset);
+   } else {
+      OUT_RELOC(dst_buffer,
+                I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+                dst_offset);
+   }
    OUT_BATCH(SET_FIELD(src_y, BLT_Y) | SET_FIELD(src_x, BLT_X));
    OUT_BATCH((uint16_t)src_pitch);
-   OUT_RELOC(src_buffer, I915_GEM_DOMAIN_RENDER, 0, src_offset);
+   if (brw->gen >= 8) {
+      OUT_RELOC64(src_buffer,
+                  I915_GEM_DOMAIN_RENDER, 0,
+                  src_offset);
+   } else {
+      OUT_RELOC(src_buffer,
+                I915_GEM_DOMAIN_RENDER, 0,
+                src_offset);
+   }
 
    ADVANCE_BATCH_TILED(dst_y_tiled, src_y_tiled);
 
@@ -467,17 +484,27 @@ intelEmitImmediateColorExpandBlit(struct brw_context *brw,
    if (dst_tiling != I915_TILING_NONE)
       blit_cmd |= XY_DST_TILED;
 
-   BEGIN_BATCH_BLT(8 + 3);
-   OUT_BATCH(opcode | (8 - 2));
+   unsigned xy_setup_blt_length = brw->gen >= 8 ? 10 : 8;
+
+   BEGIN_BATCH_BLT(xy_setup_blt_length + 3);
+   OUT_BATCH(opcode | (xy_setup_blt_length - 2));
    OUT_BATCH(br13);
    OUT_BATCH((0 << 16) | 0); /* clip x1, y1 */
    OUT_BATCH((100 << 16) | 100); /* clip x2, y2 */
-   OUT_RELOC(dst_buffer,
-             I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
-             dst_offset);
+   if (brw->gen >= 8) {
+      OUT_RELOC64(dst_buffer,
+                  I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+                  dst_offset);
+   } else {
+      OUT_RELOC(dst_buffer,
+                I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+                dst_offset);
+   }
    OUT_BATCH(0); /* bg */
    OUT_BATCH(fg_color); /* fg */
    OUT_BATCH(0); /* pattern base addr */
+   if (brw->gen >= 8)
+      OUT_BATCH(0);
 
    OUT_BATCH(blit_cmd | ((3 - 2) + dwords));
    OUT_BATCH(SET_FIELD(y, BLT_Y) | SET_FIELD(x, BLT_X));
@@ -554,22 +581,21 @@ intel_miptree_set_alpha_to_one(struct brw_context *brw,
                               struct intel_mipmap_tree *mt,
                               int x, int y, int width, int height)
 {
-   struct intel_region *region = mt->region;
    uint32_t BR13, CMD;
    int pitch, cpp;
    drm_intel_bo *aper_array[2];
 
-   pitch = region->pitch;
-   cpp = region->cpp;
+   pitch = mt->pitch;
+   cpp = mt->cpp;
 
    DBG("%s dst:buf(%p)/%d %d,%d sz:%dx%d\n",
-       __FUNCTION__, region->bo, pitch, x, y, width, height);
+       __FUNCTION__, mt->bo, pitch, x, y, width, height);
 
    BR13 = br13_for_cpp(cpp) | 0xf0 << 16;
    CMD = XY_COLOR_BLT_CMD;
    CMD |= XY_BLT_WRITE_ALPHA;
 
-   if (region->tiling != I915_TILING_NONE) {
+   if (mt->tiling != I915_TILING_NONE) {
       CMD |= XY_DST_TILED;
       pitch /= 4;
    }
@@ -577,23 +603,30 @@ intel_miptree_set_alpha_to_one(struct brw_context *brw,
 
    /* do space check before going any further */
    aper_array[0] = brw->batch.bo;
-   aper_array[1] = region->bo;
+   aper_array[1] = mt->bo;
 
    if (drm_intel_bufmgr_check_aperture_space(aper_array,
                                             ARRAY_SIZE(aper_array)) != 0) {
       intel_batchbuffer_flush(brw);
    }
 
-   bool dst_y_tiled = region->tiling == I915_TILING_Y;
+   unsigned length = brw->gen >= 8 ? 7 : 6;
+   bool dst_y_tiled = mt->tiling == I915_TILING_Y;
 
-   BEGIN_BATCH_BLT_TILED(6, dst_y_tiled, false);
-   OUT_BATCH(CMD | (6 - 2));
+   BEGIN_BATCH_BLT_TILED(length, dst_y_tiled, false);
+   OUT_BATCH(CMD | (length - 2));
    OUT_BATCH(BR13);
    OUT_BATCH(SET_FIELD(y, BLT_Y) | SET_FIELD(x, BLT_X));
    OUT_BATCH(SET_FIELD(y + height, BLT_Y) | SET_FIELD(x + width, BLT_X));
-   OUT_RELOC(region->bo,
-             I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
-             0);
+   if (brw->gen >= 8) {
+      OUT_RELOC64(mt->bo,
+                  I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+                  0);
+   } else {
+      OUT_RELOC(mt->bo,
+                I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+                0);
+   }
    OUT_BATCH(0xffffffff); /* white, but only alpha gets written */
    ADVANCE_BATCH_TILED(dst_y_tiled, false);