/**************************************************************************
- *
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
+ *
+ * Copyright 2003 VMware, Inc.
* All Rights Reserved.
- *
+ *
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
- *
+ *
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
- *
+ *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
+ *
**************************************************************************/
#include "main/colormac.h"
#include "main/fbobject.h"
+#include "brw_context.h"
+#include "brw_defines.h"
#include "intel_blit.h"
#include "intel_buffers.h"
-#include "intel_context.h"
#include "intel_fbo.h"
#include "intel_reg.h"
-#include "intel_regions.h"
#include "intel_batchbuffer.h"
#include "intel_mipmap_tree.h"
#define FILE_DEBUG_FLAG DEBUG_BLIT
static void
-intel_miptree_set_alpha_to_one(struct intel_context *intel,
+intel_miptree_set_alpha_to_one(struct brw_context *brw,
struct intel_mipmap_tree *mt,
int x, int y, int width, int height);
return BR13_8;
break;
default:
- assert(0);
- return 0;
+ unreachable("not reached");
}
}
* server).
*/
static void
-set_blitter_tiling(struct intel_context *intel,
+set_blitter_tiling(struct brw_context *brw,
bool dst_y_tiled, bool src_y_tiled)
{
- assert(intel->gen >= 6);
+ assert(brw->gen >= 6);
/* Idle the blitter before we update how tiling is interpreted. */
OUT_BATCH(MI_FLUSH_DW);
#define BEGIN_BATCH_BLT_TILED(n, dst_y_tiled, src_y_tiled) do { \
BEGIN_BATCH_BLT(n + ((dst_y_tiled || src_y_tiled) ? 14 : 0)); \
if (dst_y_tiled || src_y_tiled) \
- set_blitter_tiling(intel, dst_y_tiled, src_y_tiled); \
+ set_blitter_tiling(brw, dst_y_tiled, src_y_tiled); \
} while (0)
#define ADVANCE_BATCH_TILED(dst_y_tiled, src_y_tiled) do { \
if (dst_y_tiled || src_y_tiled) \
- set_blitter_tiling(intel, false, false); \
+ set_blitter_tiling(brw, false, false); \
ADVANCE_BATCH(); \
} while (0)
* renderbuffers/textures.
*/
bool
-intel_miptree_blit(struct intel_context *intel,
+intel_miptree_blit(struct brw_context *brw,
struct intel_mipmap_tree *src_mt,
int src_level, int src_slice,
uint32_t src_x, uint32_t src_y, bool src_flip,
uint32_t width, uint32_t height,
GLenum logicop)
{
+ /* The blitter doesn't understand multisampling at all. */
+ if (src_mt->num_samples > 0 || dst_mt->num_samples > 0)
+ return false;
+
/* No sRGB decode or encode is done by the hardware blitter, which is
* consistent with what we want in the callers (glCopyTexSubImage(),
* glBlitFramebuffer(), texture validation, etc.).
*/
- gl_format src_format = _mesa_get_srgb_format_linear(src_mt->format);
- gl_format dst_format = _mesa_get_srgb_format_linear(dst_mt->format);
+ mesa_format src_format = _mesa_get_srgb_format_linear(src_mt->format);
+ mesa_format dst_format = _mesa_get_srgb_format_linear(dst_mt->format);
/* The blitter doesn't support doing any format conversions. We do also
* support blitting ARGB8888 to XRGB8888 (trivial, the values dropped into
* channel to 1.0 at the end.
*/
if (src_format != dst_format &&
- ((src_format != MESA_FORMAT_ARGB8888 &&
- src_format != MESA_FORMAT_XRGB8888) ||
- (dst_format != MESA_FORMAT_ARGB8888 &&
- dst_format != MESA_FORMAT_XRGB8888))) {
+ ((src_format != MESA_FORMAT_B8G8R8A8_UNORM &&
+ src_format != MESA_FORMAT_B8G8R8X8_UNORM) ||
+ (dst_format != MESA_FORMAT_B8G8R8A8_UNORM &&
+ dst_format != MESA_FORMAT_B8G8R8X8_UNORM))) {
perf_debug("%s: Can't use hardware blitter from %s to %s, "
"falling back.\n", __FUNCTION__,
_mesa_get_format_name(src_format),
* pitches < 32k.
*
* As a result of these two limitations, we can only use the blitter to do
- * this copy when the region's pitch is less than 32k.
+ * this copy when the miptree's pitch is less than 32k.
*/
- if (src_mt->region->pitch > 32768 ||
- dst_mt->region->pitch > 32768) {
- perf_debug("Falling back due to >32k pitch\n");
+ if (src_mt->pitch >= 32768 ||
+ dst_mt->pitch >= 32768) {
+ perf_debug("Falling back due to >=32k pitch\n");
return false;
}
/* The blitter has no idea about HiZ or fast color clears, so we need to
* resolve the miptrees before we do anything.
*/
- intel_miptree_slice_resolve_depth(intel, src_mt, src_level, src_slice);
- intel_miptree_slice_resolve_depth(intel, dst_mt, dst_level, dst_slice);
- intel_miptree_resolve_color(intel, src_mt);
- intel_miptree_resolve_color(intel, dst_mt);
+ intel_miptree_slice_resolve_depth(brw, src_mt, src_level, src_slice);
+ intel_miptree_slice_resolve_depth(brw, dst_mt, dst_level, dst_slice);
+ intel_miptree_resolve_color(brw, src_mt);
+ intel_miptree_resolve_color(brw, dst_mt);
if (src_flip)
- src_y = src_mt->level[src_level].height - src_y - height;
+ src_y = minify(src_mt->physical_height0, src_level - src_mt->first_level) - src_y - height;
if (dst_flip)
- dst_y = dst_mt->level[dst_level].height - dst_y - height;
+ dst_y = minify(dst_mt->physical_height0, dst_level - dst_mt->first_level) - dst_y - height;
- int src_pitch = src_mt->region->pitch;
+ int src_pitch = src_mt->pitch;
if (src_flip != dst_flip)
src_pitch = -src_pitch;
src_x += src_image_x;
src_y += src_image_y;
+ /* The blitter interprets the 16-bit src x/y as a signed 16-bit value,
+ * where negative values are invalid. The values we're working with are
+ * unsigned, so make sure we don't overflow.
+ */
+ if (src_x >= 32768 || src_y >= 32768) {
+ perf_debug("Falling back due to >=32k src offset (%d, %d)\n",
+ src_x, src_y);
+ return false;
+ }
+
uint32_t dst_image_x, dst_image_y;
intel_miptree_get_image_offset(dst_mt, dst_level, dst_slice,
&dst_image_x, &dst_image_y);
dst_x += dst_image_x;
dst_y += dst_image_y;
- if (!intelEmitCopyBlit(intel,
+ /* The blitter interprets the 16-bit destination x/y as a signed 16-bit
+ * value. The values we're working with are unsigned, so make sure we
+ * don't overflow.
+ */
+ if (dst_x >= 32768 || dst_y >= 32768) {
+ perf_debug("Falling back due to >=32k dst offset (%d, %d)\n",
+ dst_x, dst_y);
+ return false;
+ }
+
+ if (!intelEmitCopyBlit(brw,
src_mt->cpp,
src_pitch,
- src_mt->region->bo, src_mt->offset,
- src_mt->region->tiling,
- dst_mt->region->pitch,
- dst_mt->region->bo, dst_mt->offset,
- dst_mt->region->tiling,
+ src_mt->bo, src_mt->offset,
+ src_mt->tiling,
+ dst_mt->pitch,
+ dst_mt->bo, dst_mt->offset,
+ dst_mt->tiling,
src_x, src_y,
dst_x, dst_y,
width, height,
return false;
}
- if (src_mt->format == MESA_FORMAT_XRGB8888 &&
- dst_mt->format == MESA_FORMAT_ARGB8888) {
- intel_miptree_set_alpha_to_one(intel, dst_mt,
+ if (src_mt->format == MESA_FORMAT_B8G8R8X8_UNORM &&
+ dst_mt->format == MESA_FORMAT_B8G8R8A8_UNORM) {
+ intel_miptree_set_alpha_to_one(brw, dst_mt,
dst_x, dst_y,
width, height);
}
/* Copy BitBlt
*/
bool
-intelEmitCopyBlit(struct intel_context *intel,
+intelEmitCopyBlit(struct brw_context *brw,
GLuint cpp,
GLshort src_pitch,
drm_intel_bo *src_buffer,
drm_intel_bo *aper_array[3];
bool dst_y_tiled = dst_tiling == I915_TILING_Y;
bool src_y_tiled = src_tiling == I915_TILING_Y;
- BATCH_LOCALS;
if (dst_tiling != I915_TILING_NONE) {
if (dst_offset & 4095)
if (src_offset & 4095)
return false;
}
- if ((dst_y_tiled || src_y_tiled) && intel->gen < 6)
+ if ((dst_y_tiled || src_y_tiled) && brw->gen < 6)
return false;
/* do space check before going any further */
do {
- aper_array[0] = intel->batch.bo;
+ aper_array[0] = brw->batch.bo;
aper_array[1] = dst_buffer;
aper_array[2] = src_buffer;
if (dri_bufmgr_check_aperture_space(aper_array, 3) != 0) {
- intel_batchbuffer_flush(intel);
+ intel_batchbuffer_flush(brw);
pass++;
} else
break;
if (pass >= 2)
return false;
- intel_batchbuffer_require_space(intel, 8 * 4, true);
+ intel_batchbuffer_require_space(brw, 8 * 4, BLT_RING);
DBG("%s src:buf(%p)/%d+%d %d,%d dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n",
__FUNCTION__,
src_buffer, src_pitch, src_offset, src_x, src_y,
return false;
}
-#ifndef I915
if (dst_tiling != I915_TILING_NONE) {
CMD |= XY_DST_TILED;
dst_pitch /= 4;
CMD |= XY_SRC_TILED;
src_pitch /= 4;
}
-#endif
if (dst_y2 <= dst_y || dst_x2 <= dst_x) {
return true;
assert(dst_x < dst_x2);
assert(dst_y < dst_y2);
+ assert(src_offset + (src_y + h - 1) * abs(src_pitch) +
+ (w * cpp) <= src_buffer->size);
+ assert(dst_offset + (dst_y + h - 1) * abs(dst_pitch) +
+ (w * cpp) <= dst_buffer->size);
- BEGIN_BATCH_BLT_TILED(8, dst_y_tiled, src_y_tiled);
+ unsigned length = brw->gen >= 8 ? 10 : 8;
- OUT_BATCH(CMD | (8 - 2));
+ BEGIN_BATCH_BLT_TILED(length, dst_y_tiled, src_y_tiled);
+ OUT_BATCH(CMD | (length - 2));
OUT_BATCH(BR13 | (uint16_t)dst_pitch);
- OUT_BATCH((dst_y << 16) | dst_x);
- OUT_BATCH((dst_y2 << 16) | dst_x2);
- OUT_RELOC_FENCED(dst_buffer,
- I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
- dst_offset);
- OUT_BATCH((src_y << 16) | src_x);
+ OUT_BATCH(SET_FIELD(dst_y, BLT_Y) | SET_FIELD(dst_x, BLT_X));
+ OUT_BATCH(SET_FIELD(dst_y2, BLT_Y) | SET_FIELD(dst_x2, BLT_X));
+ if (brw->gen >= 8) {
+ OUT_RELOC64(dst_buffer,
+ I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+ dst_offset);
+ } else {
+ OUT_RELOC(dst_buffer,
+ I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+ dst_offset);
+ }
+ OUT_BATCH(SET_FIELD(src_y, BLT_Y) | SET_FIELD(src_x, BLT_X));
OUT_BATCH((uint16_t)src_pitch);
- OUT_RELOC_FENCED(src_buffer,
- I915_GEM_DOMAIN_RENDER, 0,
- src_offset);
+ if (brw->gen >= 8) {
+ OUT_RELOC64(src_buffer,
+ I915_GEM_DOMAIN_RENDER, 0,
+ src_offset);
+ } else {
+ OUT_RELOC(src_buffer,
+ I915_GEM_DOMAIN_RENDER, 0,
+ src_offset);
+ }
ADVANCE_BATCH_TILED(dst_y_tiled, src_y_tiled);
- intel_batchbuffer_emit_mi_flush(intel);
+ intel_batchbuffer_emit_mi_flush(brw);
return true;
}
-
-/**
- * Use blitting to clear the renderbuffers named by 'flags'.
- * Note: we can't use the ctx->DrawBuffer->_ColorDrawBufferIndexes field
- * since that might include software renderbuffers or renderbuffers
- * which we're clearing with triangles.
- * \param mask bitmask of BUFFER_BIT_* values indicating buffers to clear
- */
-GLbitfield
-intelClearWithBlit(struct gl_context *ctx, GLbitfield mask)
-{
- struct intel_context *intel = intel_context(ctx);
- struct gl_framebuffer *fb = ctx->DrawBuffer;
- GLuint clear_depth_value, clear_depth_mask;
- GLint cx, cy, cw, ch;
- GLbitfield fail_mask = 0;
- BATCH_LOCALS;
-
- /* Note: we don't use this function on Gen7+ hardware, so we can safely
- * ignore fast color clear issues.
- */
- assert(intel->gen < 7);
-
- /*
- * Compute values for clearing the buffers.
- */
- clear_depth_value = 0;
- clear_depth_mask = 0;
- if (mask & BUFFER_BIT_DEPTH) {
- clear_depth_value = (GLuint) (fb->_DepthMax * ctx->Depth.Clear);
- clear_depth_mask = XY_BLT_WRITE_RGB;
- }
- if (mask & BUFFER_BIT_STENCIL) {
- clear_depth_value |= (ctx->Stencil.Clear & 0xff) << 24;
- clear_depth_mask |= XY_BLT_WRITE_ALPHA;
- }
-
- cx = fb->_Xmin;
- if (_mesa_is_winsys_fbo(fb))
- cy = ctx->DrawBuffer->Height - fb->_Ymax;
- else
- cy = fb->_Ymin;
- cw = fb->_Xmax - fb->_Xmin;
- ch = fb->_Ymax - fb->_Ymin;
-
- if (cw == 0 || ch == 0)
- return 0;
-
- /* Loop over all renderbuffers */
- mask &= (1 << BUFFER_COUNT) - 1;
- while (mask) {
- GLuint buf = ffs(mask) - 1;
- bool is_depth_stencil = buf == BUFFER_DEPTH || buf == BUFFER_STENCIL;
- struct intel_renderbuffer *irb;
- int x1, y1, x2, y2;
- uint32_t clear_val;
- uint32_t BR13, CMD;
- struct intel_region *region;
- int pitch, cpp;
- drm_intel_bo *aper_array[2];
-
- mask &= ~(1 << buf);
-
- irb = intel_get_renderbuffer(fb, buf);
- if (irb && irb->mt) {
- region = irb->mt->region;
- assert(region);
- assert(region->bo);
- } else {
- fail_mask |= 1 << buf;
- continue;
- }
-
- /* OK, clear this renderbuffer */
- x1 = cx + irb->draw_x;
- y1 = cy + irb->draw_y;
- x2 = cx + cw + irb->draw_x;
- y2 = cy + ch + irb->draw_y;
-
- pitch = region->pitch;
- cpp = region->cpp;
-
- DBG("%s dst:buf(%p)/%d %d,%d sz:%dx%d\n",
- __FUNCTION__,
- region->bo, pitch,
- x1, y1, x2 - x1, y2 - y1);
-
- BR13 = 0xf0 << 16;
- CMD = XY_COLOR_BLT_CMD;
-
- /* Setup the blit command */
- if (cpp == 4) {
- if (is_depth_stencil) {
- CMD |= clear_depth_mask;
- } else {
- /* clearing RGBA */
- CMD |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
- }
- }
-
- assert(region->tiling != I915_TILING_Y);
-
-#ifndef I915
- if (region->tiling != I915_TILING_NONE) {
- CMD |= XY_DST_TILED;
- pitch /= 4;
- }
-#endif
- BR13 |= pitch;
-
- if (is_depth_stencil) {
- clear_val = clear_depth_value;
- } else {
- uint8_t clear[4];
- GLfloat *color = ctx->Color.ClearColor.f;
-
- _mesa_unclamped_float_rgba_to_ubyte(clear, color);
-
- switch (intel_rb_format(irb)) {
- case MESA_FORMAT_ARGB8888:
- case MESA_FORMAT_XRGB8888:
- clear_val = PACK_COLOR_8888(clear[3], clear[0],
- clear[1], clear[2]);
- break;
- case MESA_FORMAT_RGB565:
- clear_val = PACK_COLOR_565(clear[0], clear[1], clear[2]);
- break;
- case MESA_FORMAT_ARGB4444:
- clear_val = PACK_COLOR_4444(clear[3], clear[0],
- clear[1], clear[2]);
- break;
- case MESA_FORMAT_ARGB1555:
- clear_val = PACK_COLOR_1555(clear[3], clear[0],
- clear[1], clear[2]);
- break;
- case MESA_FORMAT_A8:
- clear_val = PACK_COLOR_8888(clear[3], clear[3],
- clear[3], clear[3]);
- break;
- default:
- fail_mask |= 1 << buf;
- continue;
- }
- }
-
- BR13 |= br13_for_cpp(cpp);
-
- assert(x1 < x2);
- assert(y1 < y2);
-
- /* do space check before going any further */
- aper_array[0] = intel->batch.bo;
- aper_array[1] = region->bo;
-
- if (drm_intel_bufmgr_check_aperture_space(aper_array,
- ARRAY_SIZE(aper_array)) != 0) {
- intel_batchbuffer_flush(intel);
- }
-
- BEGIN_BATCH_BLT(6);
- OUT_BATCH(CMD | (6 - 2));
- OUT_BATCH(BR13);
- OUT_BATCH((y1 << 16) | x1);
- OUT_BATCH((y2 << 16) | x2);
- OUT_RELOC_FENCED(region->bo,
- I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
- 0);
- OUT_BATCH(clear_val);
- ADVANCE_BATCH();
-
- if (intel->always_flush_cache)
- intel_batchbuffer_emit_mi_flush(intel);
-
- if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL)
- mask &= ~(BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL);
- }
-
- return fail_mask;
-}
-
bool
-intelEmitImmediateColorExpandBlit(struct intel_context *intel,
+intelEmitImmediateColorExpandBlit(struct brw_context *brw,
GLuint cpp,
GLubyte *src_bits, GLuint src_size,
GLuint fg_color,
return false;
}
- assert( logic_op - GL_CLEAR >= 0 );
- assert( logic_op - GL_CLEAR < 0x10 );
+ assert((logic_op >= GL_CLEAR) && (logic_op <= (GL_CLEAR + 0x0f)));
assert(dst_pitch > 0);
if (w < 0 || h < 0)
__FUNCTION__,
dst_buffer, dst_pitch, dst_offset, x, y, w, h, src_size, dwords);
- intel_batchbuffer_require_space(intel,
- (8 * 4) +
- (3 * 4) +
- dwords * 4, true);
+ intel_batchbuffer_require_space(brw, (8 * 4) + (3 * 4) + dwords * 4, BLT_RING);
opcode = XY_SETUP_BLT_CMD;
if (cpp == 4)
opcode |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
-#ifndef I915
if (dst_tiling != I915_TILING_NONE) {
opcode |= XY_DST_TILED;
dst_pitch /= 4;
}
-#endif
br13 = dst_pitch | (translate_raster_op(logic_op) << 16) | (1 << 29);
br13 |= br13_for_cpp(cpp);
if (dst_tiling != I915_TILING_NONE)
blit_cmd |= XY_DST_TILED;
- BEGIN_BATCH_BLT(8 + 3);
- OUT_BATCH(opcode | (8 - 2));
+ unsigned xy_setup_blt_length = brw->gen >= 8 ? 10 : 8;
+
+ BEGIN_BATCH_BLT(xy_setup_blt_length + 3);
+ OUT_BATCH(opcode | (xy_setup_blt_length - 2));
OUT_BATCH(br13);
OUT_BATCH((0 << 16) | 0); /* clip x1, y1 */
OUT_BATCH((100 << 16) | 100); /* clip x2, y2 */
- OUT_RELOC_FENCED(dst_buffer,
- I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
- dst_offset);
+ if (brw->gen >= 8) {
+ OUT_RELOC64(dst_buffer,
+ I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+ dst_offset);
+ } else {
+ OUT_RELOC(dst_buffer,
+ I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+ dst_offset);
+ }
OUT_BATCH(0); /* bg */
OUT_BATCH(fg_color); /* fg */
OUT_BATCH(0); /* pattern base addr */
+ if (brw->gen >= 8)
+ OUT_BATCH(0);
OUT_BATCH(blit_cmd | ((3 - 2) + dwords));
- OUT_BATCH((y << 16) | x);
- OUT_BATCH(((y + h) << 16) | (x + w));
+ OUT_BATCH(SET_FIELD(y, BLT_Y) | SET_FIELD(x, BLT_X));
+ OUT_BATCH(SET_FIELD(y + h, BLT_Y) | SET_FIELD(x + w, BLT_X));
ADVANCE_BATCH();
- intel_batchbuffer_data(intel, src_bits, dwords * 4, true);
+ intel_batchbuffer_data(brw, src_bits, dwords * 4, BLT_RING);
- intel_batchbuffer_emit_mi_flush(intel);
+ intel_batchbuffer_emit_mi_flush(brw);
return true;
}
* end to cover the last if we need.
*/
void
-intel_emit_linear_blit(struct intel_context *intel,
+intel_emit_linear_blit(struct brw_context *brw,
drm_intel_bo *dst_bo,
unsigned int dst_offset,
drm_intel_bo *src_bo,
unsigned int src_offset,
unsigned int size)
{
- struct gl_context *ctx = &intel->ctx;
+ struct gl_context *ctx = &brw->ctx;
GLuint pitch, height;
bool ok;
*/
pitch = ROUND_DOWN_TO(MIN2(size, (1 << 15) - 1), 4);
height = (pitch == 0) ? 1 : size / pitch;
- ok = intelEmitCopyBlit(intel, 1,
+ ok = intelEmitCopyBlit(brw, 1,
pitch, src_bo, src_offset, I915_TILING_NONE,
pitch, dst_bo, dst_offset, I915_TILING_NONE,
0, 0, /* src x/y */
assert (size < (1 << 15));
pitch = ALIGN(size, 4);
if (size != 0) {
- ok = intelEmitCopyBlit(intel, 1,
+ ok = intelEmitCopyBlit(brw, 1,
pitch, src_bo, src_offset, I915_TILING_NONE,
pitch, dst_bo, dst_offset, I915_TILING_NONE,
0, 0, /* src x/y */
* miptree.
*/
static void
-intel_miptree_set_alpha_to_one(struct intel_context *intel,
+intel_miptree_set_alpha_to_one(struct brw_context *brw,
struct intel_mipmap_tree *mt,
int x, int y, int width, int height)
{
- struct intel_region *region = mt->region;
uint32_t BR13, CMD;
int pitch, cpp;
drm_intel_bo *aper_array[2];
- BATCH_LOCALS;
- pitch = region->pitch;
- cpp = region->cpp;
+ pitch = mt->pitch;
+ cpp = mt->cpp;
DBG("%s dst:buf(%p)/%d %d,%d sz:%dx%d\n",
- __FUNCTION__, region->bo, pitch, x, y, width, height);
+ __FUNCTION__, mt->bo, pitch, x, y, width, height);
BR13 = br13_for_cpp(cpp) | 0xf0 << 16;
CMD = XY_COLOR_BLT_CMD;
CMD |= XY_BLT_WRITE_ALPHA;
-#ifndef I915
- if (region->tiling != I915_TILING_NONE) {
+ if (mt->tiling != I915_TILING_NONE) {
CMD |= XY_DST_TILED;
pitch /= 4;
}
-#endif
BR13 |= pitch;
/* do space check before going any further */
- aper_array[0] = intel->batch.bo;
- aper_array[1] = region->bo;
+ aper_array[0] = brw->batch.bo;
+ aper_array[1] = mt->bo;
if (drm_intel_bufmgr_check_aperture_space(aper_array,
ARRAY_SIZE(aper_array)) != 0) {
- intel_batchbuffer_flush(intel);
+ intel_batchbuffer_flush(brw);
}
- bool dst_y_tiled = region->tiling == I915_TILING_Y;
+ unsigned length = brw->gen >= 8 ? 7 : 6;
+ bool dst_y_tiled = mt->tiling == I915_TILING_Y;
- BEGIN_BATCH_BLT_TILED(6, dst_y_tiled, false);
- OUT_BATCH(CMD | (6 - 2));
+ BEGIN_BATCH_BLT_TILED(length, dst_y_tiled, false);
+ OUT_BATCH(CMD | (length - 2));
OUT_BATCH(BR13);
- OUT_BATCH((y << 16) | x);
- OUT_BATCH(((y + height) << 16) | (x + width));
- OUT_RELOC_FENCED(region->bo,
- I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
- 0);
+ OUT_BATCH(SET_FIELD(y, BLT_Y) | SET_FIELD(x, BLT_X));
+ OUT_BATCH(SET_FIELD(y + height, BLT_Y) | SET_FIELD(x + width, BLT_X));
+ if (brw->gen >= 8) {
+ OUT_RELOC64(mt->bo,
+ I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+ 0);
+ } else {
+ OUT_RELOC(mt->bo,
+ I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+ 0);
+ }
OUT_BATCH(0xffffffff); /* white, but only alpha gets written */
ADVANCE_BATCH_TILED(dst_y_tiled, false);
- intel_batchbuffer_emit_mi_flush(intel);
+ intel_batchbuffer_emit_mi_flush(brw);
}
projects / mesa.git / blobdiff