#include "main/colormac.h"
#include "main/fbobject.h"
+#include "brw_context.h"
#include "intel_blit.h"
#include "intel_buffers.h"
-#include "intel_context.h"
#include "intel_fbo.h"
#include "intel_reg.h"
#include "intel_regions.h"
#define FILE_DEBUG_FLAG DEBUG_BLIT
static void
-intel_miptree_set_alpha_to_one(struct intel_context *intel,
+intel_miptree_set_alpha_to_one(struct brw_context *brw,
struct intel_mipmap_tree *mt,
int x, int y, int width, int height);
* server).
*/
static void
-set_blitter_tiling(struct intel_context *intel,
+set_blitter_tiling(struct brw_context *brw,
bool dst_y_tiled, bool src_y_tiled)
{
- assert(intel->gen >= 6);
+ assert(brw->gen >= 6);
/* Idle the blitter before we update how tiling is interpreted. */
OUT_BATCH(MI_FLUSH_DW);
#define BEGIN_BATCH_BLT_TILED(n, dst_y_tiled, src_y_tiled) do { \
BEGIN_BATCH_BLT(n + ((dst_y_tiled || src_y_tiled) ? 14 : 0)); \
if (dst_y_tiled || src_y_tiled) \
- set_blitter_tiling(intel, dst_y_tiled, src_y_tiled); \
+ set_blitter_tiling(brw, dst_y_tiled, src_y_tiled); \
} while (0)
#define ADVANCE_BATCH_TILED(dst_y_tiled, src_y_tiled) do { \
if (dst_y_tiled || src_y_tiled) \
- set_blitter_tiling(intel, false, false); \
+ set_blitter_tiling(brw, false, false); \
ADVANCE_BATCH(); \
} while (0)
* renderbuffers/textures.
*/
bool
-intel_miptree_blit(struct intel_context *intel,
+intel_miptree_blit(struct brw_context *brw,
struct intel_mipmap_tree *src_mt,
int src_level, int src_slice,
uint32_t src_x, uint32_t src_y, bool src_flip,
/* The blitter has no idea about HiZ or fast color clears, so we need to
* resolve the miptrees before we do anything.
*/
- intel_miptree_slice_resolve_depth(intel, src_mt, src_level, src_slice);
- intel_miptree_slice_resolve_depth(intel, dst_mt, dst_level, dst_slice);
- intel_miptree_resolve_color(intel, src_mt);
- intel_miptree_resolve_color(intel, dst_mt);
+ intel_miptree_slice_resolve_depth(brw, src_mt, src_level, src_slice);
+ intel_miptree_slice_resolve_depth(brw, dst_mt, dst_level, dst_slice);
+ intel_miptree_resolve_color(brw, src_mt);
+ intel_miptree_resolve_color(brw, dst_mt);
if (src_flip)
src_y = src_mt->level[src_level].height - src_y - height;
dst_x += dst_image_x;
dst_y += dst_image_y;
- if (!intelEmitCopyBlit(intel,
+ if (!intelEmitCopyBlit(brw,
src_mt->cpp,
src_pitch,
src_mt->region->bo, src_mt->offset,
if (src_mt->format == MESA_FORMAT_XRGB8888 &&
dst_mt->format == MESA_FORMAT_ARGB8888) {
- intel_miptree_set_alpha_to_one(intel, dst_mt,
+ intel_miptree_set_alpha_to_one(brw, dst_mt,
dst_x, dst_y,
width, height);
}
/* Copy BitBlt
*/
bool
-intelEmitCopyBlit(struct intel_context *intel,
+intelEmitCopyBlit(struct brw_context *brw,
GLuint cpp,
GLshort src_pitch,
drm_intel_bo *src_buffer,
drm_intel_bo *aper_array[3];
bool dst_y_tiled = dst_tiling == I915_TILING_Y;
bool src_y_tiled = src_tiling == I915_TILING_Y;
- BATCH_LOCALS;
if (dst_tiling != I915_TILING_NONE) {
if (dst_offset & 4095)
if (src_offset & 4095)
return false;
}
- if ((dst_y_tiled || src_y_tiled) && intel->gen < 6)
+ if ((dst_y_tiled || src_y_tiled) && brw->gen < 6)
return false;
/* do space check before going any further */
do {
- aper_array[0] = intel->batch.bo;
+ aper_array[0] = brw->batch.bo;
aper_array[1] = dst_buffer;
aper_array[2] = src_buffer;
if (dri_bufmgr_check_aperture_space(aper_array, 3) != 0) {
- intel_batchbuffer_flush(intel);
+ intel_batchbuffer_flush(brw);
pass++;
} else
break;
if (pass >= 2)
return false;
- intel_batchbuffer_require_space(intel, 8 * 4, true);
+ intel_batchbuffer_require_space(brw, 8 * 4, true);
DBG("%s src:buf(%p)/%d+%d %d,%d dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n",
__FUNCTION__,
src_buffer, src_pitch, src_offset, src_x, src_y,
ADVANCE_BATCH_TILED(dst_y_tiled, src_y_tiled);
- intel_batchbuffer_emit_mi_flush(intel);
+ intel_batchbuffer_emit_mi_flush(brw);
return true;
}
-
-/**
- * Use blitting to clear the renderbuffers named by 'flags'.
- * Note: we can't use the ctx->DrawBuffer->_ColorDrawBufferIndexes field
- * since that might include software renderbuffers or renderbuffers
- * which we're clearing with triangles.
- * \param mask bitmask of BUFFER_BIT_* values indicating buffers to clear
- */
-GLbitfield
-intelClearWithBlit(struct gl_context *ctx, GLbitfield mask)
-{
- struct intel_context *intel = intel_context(ctx);
- struct gl_framebuffer *fb = ctx->DrawBuffer;
- GLuint clear_depth_value, clear_depth_mask;
- GLint cx, cy, cw, ch;
- GLbitfield fail_mask = 0;
- BATCH_LOCALS;
-
- /* Note: we don't use this function on Gen7+ hardware, so we can safely
- * ignore fast color clear issues.
- */
- assert(intel->gen < 7);
-
- /*
- * Compute values for clearing the buffers.
- */
- clear_depth_value = 0;
- clear_depth_mask = 0;
- if (mask & BUFFER_BIT_DEPTH) {
- clear_depth_value = (GLuint) (fb->_DepthMax * ctx->Depth.Clear);
- clear_depth_mask = XY_BLT_WRITE_RGB;
- }
- if (mask & BUFFER_BIT_STENCIL) {
- clear_depth_value |= (ctx->Stencil.Clear & 0xff) << 24;
- clear_depth_mask |= XY_BLT_WRITE_ALPHA;
- }
-
- cx = fb->_Xmin;
- if (_mesa_is_winsys_fbo(fb))
- cy = ctx->DrawBuffer->Height - fb->_Ymax;
- else
- cy = fb->_Ymin;
- cw = fb->_Xmax - fb->_Xmin;
- ch = fb->_Ymax - fb->_Ymin;
-
- if (cw == 0 || ch == 0)
- return 0;
-
- /* Loop over all renderbuffers */
- mask &= (1 << BUFFER_COUNT) - 1;
- while (mask) {
- GLuint buf = ffs(mask) - 1;
- bool is_depth_stencil = buf == BUFFER_DEPTH || buf == BUFFER_STENCIL;
- struct intel_renderbuffer *irb;
- int x1, y1, x2, y2;
- uint32_t clear_val;
- uint32_t BR13, CMD;
- struct intel_region *region;
- int pitch, cpp;
- drm_intel_bo *aper_array[2];
-
- mask &= ~(1 << buf);
-
- irb = intel_get_renderbuffer(fb, buf);
- if (irb && irb->mt) {
- region = irb->mt->region;
- assert(region);
- assert(region->bo);
- } else {
- fail_mask |= 1 << buf;
- continue;
- }
-
- /* OK, clear this renderbuffer */
- x1 = cx + irb->draw_x;
- y1 = cy + irb->draw_y;
- x2 = cx + cw + irb->draw_x;
- y2 = cy + ch + irb->draw_y;
-
- pitch = region->pitch;
- cpp = region->cpp;
-
- DBG("%s dst:buf(%p)/%d %d,%d sz:%dx%d\n",
- __FUNCTION__,
- region->bo, pitch,
- x1, y1, x2 - x1, y2 - y1);
-
- BR13 = 0xf0 << 16;
- CMD = XY_COLOR_BLT_CMD;
-
- /* Setup the blit command */
- if (cpp == 4) {
- if (is_depth_stencil) {
- CMD |= clear_depth_mask;
- } else {
- /* clearing RGBA */
- CMD |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
- }
- }
-
- assert(region->tiling != I915_TILING_Y);
-
- if (region->tiling != I915_TILING_NONE) {
- CMD |= XY_DST_TILED;
- pitch /= 4;
- }
- BR13 |= pitch;
-
- if (is_depth_stencil) {
- clear_val = clear_depth_value;
- } else {
- uint8_t clear[4];
- GLfloat *color = ctx->Color.ClearColor.f;
-
- _mesa_unclamped_float_rgba_to_ubyte(clear, color);
-
- switch (intel_rb_format(irb)) {
- case MESA_FORMAT_ARGB8888:
- case MESA_FORMAT_XRGB8888:
- clear_val = PACK_COLOR_8888(clear[3], clear[0],
- clear[1], clear[2]);
- break;
- case MESA_FORMAT_RGB565:
- clear_val = PACK_COLOR_565(clear[0], clear[1], clear[2]);
- break;
- case MESA_FORMAT_ARGB4444:
- clear_val = PACK_COLOR_4444(clear[3], clear[0],
- clear[1], clear[2]);
- break;
- case MESA_FORMAT_ARGB1555:
- clear_val = PACK_COLOR_1555(clear[3], clear[0],
- clear[1], clear[2]);
- break;
- case MESA_FORMAT_A8:
- clear_val = PACK_COLOR_8888(clear[3], clear[3],
- clear[3], clear[3]);
- break;
- default:
- fail_mask |= 1 << buf;
- continue;
- }
- }
-
- BR13 |= br13_for_cpp(cpp);
-
- assert(x1 < x2);
- assert(y1 < y2);
-
- /* do space check before going any further */
- aper_array[0] = intel->batch.bo;
- aper_array[1] = region->bo;
-
- if (drm_intel_bufmgr_check_aperture_space(aper_array,
- ARRAY_SIZE(aper_array)) != 0) {
- intel_batchbuffer_flush(intel);
- }
-
- BEGIN_BATCH_BLT(6);
- OUT_BATCH(CMD | (6 - 2));
- OUT_BATCH(BR13);
- OUT_BATCH((y1 << 16) | x1);
- OUT_BATCH((y2 << 16) | x2);
- OUT_RELOC_FENCED(region->bo,
- I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
- 0);
- OUT_BATCH(clear_val);
- ADVANCE_BATCH();
-
- if (intel->always_flush_cache)
- intel_batchbuffer_emit_mi_flush(intel);
-
- if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL)
- mask &= ~(BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL);
- }
-
- return fail_mask;
-}
-
bool
-intelEmitImmediateColorExpandBlit(struct intel_context *intel,
+intelEmitImmediateColorExpandBlit(struct brw_context *brw,
GLuint cpp,
GLubyte *src_bits, GLuint src_size,
GLuint fg_color,
__FUNCTION__,
dst_buffer, dst_pitch, dst_offset, x, y, w, h, src_size, dwords);
- intel_batchbuffer_require_space(intel,
- (8 * 4) +
- (3 * 4) +
- dwords * 4, true);
+ intel_batchbuffer_require_space(brw, (8 * 4) + (3 * 4) + dwords * 4, true);
opcode = XY_SETUP_BLT_CMD;
if (cpp == 4)
OUT_BATCH(((y + h) << 16) | (x + w));
ADVANCE_BATCH();
- intel_batchbuffer_data(intel, src_bits, dwords * 4, true);
+ intel_batchbuffer_data(brw, src_bits, dwords * 4, true);
- intel_batchbuffer_emit_mi_flush(intel);
+ intel_batchbuffer_emit_mi_flush(brw);
return true;
}
* end to cover the last if we need.
*/
void
-intel_emit_linear_blit(struct intel_context *intel,
+intel_emit_linear_blit(struct brw_context *brw,
drm_intel_bo *dst_bo,
unsigned int dst_offset,
drm_intel_bo *src_bo,
unsigned int src_offset,
unsigned int size)
{
- struct gl_context *ctx = &intel->ctx;
+ struct gl_context *ctx = &brw->ctx;
GLuint pitch, height;
bool ok;
*/
pitch = ROUND_DOWN_TO(MIN2(size, (1 << 15) - 1), 4);
height = (pitch == 0) ? 1 : size / pitch;
- ok = intelEmitCopyBlit(intel, 1,
+ ok = intelEmitCopyBlit(brw, 1,
pitch, src_bo, src_offset, I915_TILING_NONE,
pitch, dst_bo, dst_offset, I915_TILING_NONE,
0, 0, /* src x/y */
assert (size < (1 << 15));
pitch = ALIGN(size, 4);
if (size != 0) {
- ok = intelEmitCopyBlit(intel, 1,
+ ok = intelEmitCopyBlit(brw, 1,
pitch, src_bo, src_offset, I915_TILING_NONE,
pitch, dst_bo, dst_offset, I915_TILING_NONE,
0, 0, /* src x/y */
* miptree.
*/
static void
-intel_miptree_set_alpha_to_one(struct intel_context *intel,
+intel_miptree_set_alpha_to_one(struct brw_context *brw,
struct intel_mipmap_tree *mt,
int x, int y, int width, int height)
{
uint32_t BR13, CMD;
int pitch, cpp;
drm_intel_bo *aper_array[2];
- BATCH_LOCALS;
pitch = region->pitch;
cpp = region->cpp;
BR13 |= pitch;
/* do space check before going any further */
- aper_array[0] = intel->batch.bo;
+ aper_array[0] = brw->batch.bo;
aper_array[1] = region->bo;
if (drm_intel_bufmgr_check_aperture_space(aper_array,
ARRAY_SIZE(aper_array)) != 0) {
- intel_batchbuffer_flush(intel);
+ intel_batchbuffer_flush(brw);
}
bool dst_y_tiled = region->tiling == I915_TILING_Y;
OUT_BATCH(0xffffffff); /* white, but only alpha gets written */
ADVANCE_BATCH_TILED(dst_y_tiled, false);
- intel_batchbuffer_emit_mi_flush(intel);
+ intel_batchbuffer_emit_mi_flush(brw);
}