-/**************************************************************************
- *
+/*
* Copyright 2003 VMware, Inc.
* All Rights Reserved.
*
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
+ * distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- **************************************************************************/
-
+ */
#include "main/mtypes.h"
#include "main/blit.h"
#include "main/context.h"
#include "main/enums.h"
-#include "main/colormac.h"
#include "main/fbobject.h"
#include "brw_context.h"
#include "intel_blit.h"
#include "intel_buffers.h"
#include "intel_fbo.h"
-#include "intel_reg.h"
#include "intel_batchbuffer.h"
#include "intel_mipmap_tree.h"
}
}
-static uint32_t
-get_tr_horizontal_align(uint32_t tr_mode, uint32_t cpp, bool is_src) {
- /* Alignment tables for YF/YS tiled surfaces. */
- const uint32_t align_2d_yf[] = {64, 64, 32, 32, 16};
- const uint32_t bpp = cpp * 8;
- const uint32_t shift = is_src ? 17 : 10;
- uint32_t align;
- int i = 0;
-
- if (tr_mode == INTEL_MIPTREE_TRMODE_NONE)
- return 0;
-
- /* Compute array index. */
- assert (bpp >= 8 && bpp <= 128 && _mesa_is_pow_two(bpp));
- i = ffs(bpp / 8) - 1;
-
- align = tr_mode == INTEL_MIPTREE_TRMODE_YF ?
- align_2d_yf[i] :
- 4 * align_2d_yf[i];
-
- assert(_mesa_is_pow_two(align));
-
- /* XY_FAST_COPY_BLT doesn't support horizontal alignment of 16. */
- if (align == 16)
- align = 32;
-
- return (ffs(align) - 6) << shift;
-}
-
-static uint32_t
-get_tr_vertical_align(uint32_t tr_mode, uint32_t cpp, bool is_src) {
- /* Vertical alignment tables for YF/YS tiled surfaces. */
- const unsigned align_2d_yf[] = {64, 32, 32, 16, 16};
- const uint32_t bpp = cpp * 8;
- const uint32_t shift = is_src ? 15 : 8;
- uint32_t align;
- int i = 0;
-
- if (tr_mode == INTEL_MIPTREE_TRMODE_NONE)
- return 0;
-
- /* Compute array index. */
- assert (bpp >= 8 && bpp <= 128 && _mesa_is_pow_two(bpp));
- i = ffs(bpp / 8) - 1;
-
- align = tr_mode == INTEL_MIPTREE_TRMODE_YF ?
- align_2d_yf[i] :
- 4 * align_2d_yf[i];
-
- assert(_mesa_is_pow_two(align));
-
- /* XY_FAST_COPY_BLT doesn't support vertical alignments of 16 and 32. */
- if (align == 16 || align == 32)
- align = 64;
-
- return (ffs(align) - 7) << shift;
-}
-
/**
* Emits the packet for switching the blitter from X to Y tiled or back.
*
return false;
/* No sRGB decode or encode is done by the hardware blitter, which is
- * consistent with what we want in the callers (glCopyTexSubImage(),
- * glBlitFramebuffer(), texture validation, etc.).
+ * consistent with what we want in many callers (glCopyTexSubImage(),
+ * texture validation, etc.).
*/
mesa_format src_format = _mesa_get_srgb_format_linear(src_mt->format);
mesa_format dst_format = _mesa_get_srgb_format_linear(dst_mt->format);
*/
intel_miptree_slice_resolve_depth(brw, src_mt, src_level, src_slice);
intel_miptree_slice_resolve_depth(brw, dst_mt, dst_level, dst_slice);
- intel_miptree_resolve_color(brw, src_mt);
- intel_miptree_resolve_color(brw, dst_mt);
+ intel_miptree_resolve_color(brw, src_mt, 0);
+ intel_miptree_resolve_color(brw, dst_mt, 0);
if (src_flip)
src_y = minify(src_mt->physical_height0, src_level - src_mt->first_level) - src_y - height;
if (dst_flip)
dst_y = minify(dst_mt->physical_height0, dst_level - dst_mt->first_level) - dst_y - height;
- int src_pitch = src_mt->pitch;
- if (src_flip != dst_flip)
- src_pitch = -src_pitch;
-
uint32_t src_image_x, src_image_y, dst_image_x, dst_image_y;
intel_miptree_get_image_offset(src_mt, src_level, src_slice,
&src_image_x, &src_image_y);
if (!intelEmitCopyBlit(brw,
src_mt->cpp,
- src_pitch,
+ src_flip == dst_flip ? src_mt->pitch : -src_mt->pitch,
src_mt->bo, src_mt->offset,
src_mt->tiling,
src_mt->tr_mode,
int16_t dst_x, int16_t dst_y,
uintptr_t dst_offset, uint32_t dst_pitch,
uint32_t dst_tiling, uint32_t dst_tr_mode,
- int16_t w, int16_t h, uint32_t cpp)
+ int16_t w, int16_t h, uint32_t cpp,
+ GLenum logic_op)
{
const bool dst_tiling_none = dst_tiling == I915_TILING_NONE;
const bool src_tiling_none = src_tiling == I915_TILING_NONE;
if (brw->gen < 9)
return false;
- if (src_buffer->handle == dst_buffer->handle &&
- _mesa_regions_overlap(src_x, src_y, src_x + w, src_y + h,
- dst_x, dst_y, dst_x + w, dst_y + h))
- return false;
-
/* Enable fast copy blit only if the surfaces are Yf/Ys tiled.
* FIXME: Based on performance data, remove this condition later to
* enable for all types of surfaces.
dst_tr_mode == INTEL_MIPTREE_TRMODE_NONE)
return false;
+ if (logic_op != GL_COPY)
+ return false;
+
+ /* The start pixel for Fast Copy blit should be on an OWord boundary. */
+ if ((dst_x * cpp | src_x * cpp) & 15)
+ return false;
+
/* For all surface types buffers must be cacheline-aligned. */
if ((dst_offset | src_offset) & 63)
return false;
- /* Color depth greater than 128 bits not supported. */
- if (cpp > 16)
+ /* Color depths which are not power of 2 or greater than 128 bits are
+ * not supported.
+ */
+ if (!_mesa_is_pow_two(cpp) || cpp > 16)
return false;
/* For Fast Copy Blits the pitch cannot be a negative number. So, bit 15
(dst_tiling_none && dst_pitch % 16 != 0))
return false;
- /* For Tiled surfaces, the pitch has to be a multiple of the Tile width
- * (X direction width of the Tile). This means the pitch value will
- * always be Cache Line aligned (64byte multiple).
- */
- if ((!dst_tiling_none && dst_pitch % 64 != 0) ||
- (!src_tiling_none && src_pitch % 64 != 0))
- return false;
-
return true;
}
if (src_tiling != I915_TILING_NONE)
SET_TILING_XY_FAST_COPY_BLT(src_tiling, src_tr_mode, XY_FAST_SRC);
-
- CMD |= get_tr_horizontal_align(src_tr_mode, cpp, true /* is_src */);
- CMD |= get_tr_vertical_align(src_tr_mode, cpp, true /* is_src */);
-
- CMD |= get_tr_horizontal_align(dst_tr_mode, cpp, false /* is_src */);
- CMD |= get_tr_vertical_align(dst_tr_mode, cpp, false /* is_src */);
-
} else {
assert(cpp <= 4);
switch (cpp) {
bool dst_y_tiled = dst_tiling == I915_TILING_Y;
bool src_y_tiled = src_tiling == I915_TILING_Y;
bool use_fast_copy_blit = false;
+ uint32_t src_tile_w, src_tile_h;
+ uint32_t dst_tile_w, dst_tile_h;
if ((dst_y_tiled || src_y_tiled) && brw->gen < 6)
return false;
src_buffer, src_pitch, src_offset, src_x, src_y,
dst_buffer, dst_pitch, dst_offset, dst_x, dst_y, w, h);
+ intel_get_tile_dims(src_tiling, src_tr_mode, cpp, &src_tile_w, &src_tile_h);
+ intel_get_tile_dims(dst_tiling, dst_tr_mode, cpp, &dst_tile_w, &dst_tile_h);
+
+ /* For Tiled surfaces, the pitch has to be a multiple of the Tile width
+ * (X direction width of the Tile). This is ensured while allocating the
+ * buffer object.
+ */
+ assert(src_tiling == I915_TILING_NONE || (src_pitch % src_tile_w) == 0);
+ assert(dst_tiling == I915_TILING_NONE || (dst_pitch % dst_tile_w) == 0);
+
use_fast_copy_blit = can_fast_copy_blit(brw,
src_buffer,
src_x, src_y,
dst_x, dst_y,
dst_offset, dst_pitch,
dst_tiling, dst_tr_mode,
- w, h, cpp);
- assert(use_fast_copy_blit ||
- (src_tr_mode == INTEL_MIPTREE_TRMODE_NONE &&
- dst_tr_mode == INTEL_MIPTREE_TRMODE_NONE));
+ w, h, cpp, logic_op);
+ if (!use_fast_copy_blit &&
+ (src_tr_mode != INTEL_MIPTREE_TRMODE_NONE ||
+ dst_tr_mode != INTEL_MIPTREE_TRMODE_NONE))
+ return false;
if (use_fast_copy_blit) {
+ assert(logic_op == GL_COPY);
+
/* When two sequential fast copy blits have different source surfaces,
* but their destinations refer to the same destination surfaces and
* therefore destinations overlap it is imperative that a flush be
dst_tiling, dst_tr_mode,
cpp, use_fast_copy_blit);
- /* For tiled source and destination, pitch value should be specified
- * as a number of Dwords.
- */
- if (dst_tiling != I915_TILING_NONE)
- dst_pitch /= 4;
-
- if (src_tiling != I915_TILING_NONE)
- src_pitch /= 4;
-
} else {
- assert(!dst_y_tiled || (dst_pitch % 128) == 0);
- assert(!src_y_tiled || (src_pitch % 128) == 0);
-
/* For big formats (such as floating point), do the copy using 16 or
* 32bpp and multiply the coordinates.
*/
CMD = xy_blit_cmd(src_tiling, src_tr_mode,
dst_tiling, dst_tr_mode,
cpp, use_fast_copy_blit);
+ }
- if (dst_tiling != I915_TILING_NONE)
- dst_pitch /= 4;
+ /* For tiled source and destination, pitch value should be specified
+ * as a number of Dwords.
+ */
+ if (dst_tiling != I915_TILING_NONE)
+ dst_pitch /= 4;
- if (src_tiling != I915_TILING_NONE)
- src_pitch /= 4;
- }
+ if (src_tiling != I915_TILING_NONE)
+ src_pitch /= 4;
- if (dst_y2 <= dst_y || dst_x2 <= dst_x) {
+ if (dst_y2 <= dst_y || dst_x2 <= dst_x)
return true;
- }
assert(dst_x < dst_x2);
assert(dst_y < dst_y2);
projects / mesa.git / blobdiff