Revert 5 i965 patches: 8e27a4d2, 373143ed, c5bdf9be, 6f56e142, 88e3d404

[mesa.git] / src / mesa / drivers / dri / i965 / intel_buffer_objects.c

diff --git a/src/mesa/drivers/dri/i965/intel_buffer_objects.c b/src/mesa/drivers/dri/i965/intel_buffer_objects.c
index 260308a80a26f3d21d3f7287a58cd05733f0e282..96dacde04fba60e800e7680f40e225bb725cf9c1 100644 (file)
--- a/src/mesa/drivers/dri/i965/intel_buffer_objects.c
+++ b/src/mesa/drivers/dri/i965/intel_buffer_objects.c
@@ -401,8 +401,12 @@ intel_bufferobj_map_range(struct gl_context * ctx,
     * doesn't require the current contents of that range, make a new
     * BO, and we'll copy what they put in there out at unmap or
     * FlushRange time.
+    *
+    * That is, unless they're looking for a persistent mapping -- we would
+    * need to do blits in the MemoryBarrier call, and it's easier to just do a
+    * GPU stall and do a mapping.
     */
-   if (!(access & GL_MAP_UNSYNCHRONIZED_BIT) &&
+   if (!(access & (GL_MAP_UNSYNCHRONIZED_BIT | GL_MAP_PERSISTENT_BIT)) &&
        (access & GL_MAP_INVALIDATE_RANGE_BIT) &&
        drm_intel_bo_busy(intel_obj->buffer)) {
       /* Ensure that the base alignment of the allocation meets the alignment
@@ -429,7 +433,8 @@ intel_bufferobj_map_range(struct gl_context * ctx,
 
    if (access & GL_MAP_UNSYNCHRONIZED_BIT)
       drm_intel_gem_bo_map_unsynchronized(intel_obj->buffer);
-   else if (!brw->has_llc && !(access & GL_MAP_READ_BIT)) {
+   else if (!brw->has_llc && (!(access & GL_MAP_READ_BIT) ||
+                              (access & GL_MAP_PERSISTENT_BIT))) {
       drm_intel_gem_bo_map_gtt(intel_obj->buffer);
       intel_bufferobj_mark_inactive(intel_obj);
    } else {