{
struct gl_context ctx; /**< base class, must be first field */
- struct
- {
- void (*destroy) (struct intel_context * intel);
- void (*finish_batch) (struct intel_context * intel);
- void (*new_batch) (struct intel_context * intel);
-
- void (*invalidate_state) (struct intel_context *intel,
- GLuint new_state);
-
- void (*debug_batch)(struct intel_context *intel);
- void (*annotate_aub)(struct intel_context *intel);
- bool (*render_target_supported)(struct intel_context *intel,
- struct gl_renderbuffer *rb);
-
- /** Can HiZ be enabled on a depthbuffer of the given format? */
- bool (*is_hiz_depth_format)(struct intel_context *intel,
- gl_format format);
-
- void (*update_texture_surface)(struct gl_context *ctx,
- unsigned unit,
- uint32_t *binding_table,
- unsigned surf_index);
- void (*update_renderbuffer_surface)(struct brw_context *brw,
- struct gl_renderbuffer *rb,
- bool layered,
- unsigned unit);
- void (*update_null_renderbuffer_surface)(struct brw_context *brw,
- unsigned unit);
- void (*create_constant_surface)(struct brw_context *brw,
- drm_intel_bo *bo,
- uint32_t offset,
- uint32_t size,
- uint32_t *out_offset,
- bool dword_pitch);
-
- /**
- * Send the appropriate state packets to configure depth, stencil, and
- * HiZ buffers (i965+ only)
- */
- void (*emit_depth_stencil_hiz)(struct brw_context *brw,
- struct intel_mipmap_tree *depth_mt,
- uint32_t depth_offset,
- uint32_t depthbuffer_format,
- uint32_t depth_surface_type,
- struct intel_mipmap_tree *stencil_mt,
- bool hiz, bool separate_stencil,
- uint32_t width, uint32_t height,
- uint32_t tile_x, uint32_t tile_y);
-
- } vtbl;
-
GLuint NewGLState;
dri_bufmgr *bufmgr;
- unsigned int maxBatchSize;
/**
* Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
*/
int gen;
int gt;
- bool needs_ff_sync;
bool is_haswell;
bool is_baytrail;
bool is_g4x;
GLenum reduced_primitive;
- /**
- * Set if rendering has occured to the drawable's front buffer.
- *
- * This is used in the DRI2 case to detect that glFlush should also copy
- * the contents of the fake front buffer to the real front buffer.
- */
- bool front_buffer_dirty;
-
- /**
- * Track whether front-buffer rendering is currently enabled
- *
- * A separate flag is used to track this in order to support MRT more
- * easily.
- */
- bool is_front_buffer_rendering;
- /**
- * Track whether front-buffer is the current read target.
- *
- * This is closely associated with is_front_buffer_rendering, but may
- * be set separately. The DRI2 fake front buffer must be referenced
- * either way.
- */
- bool is_front_buffer_reading;
-
int driFd;
__DRIcontext *driContext;
struct intel_screen *intelScreen;
-
- /**
- * Configuration cache
- */
- driOptionCache optionCache;
};
/**
* intel_context.c:
*/
-extern bool intelInitContext(struct intel_context *intel,
+extern bool intelInitContext(struct brw_context *brw,
int api,
unsigned major_version,
unsigned minor_version,
void intel_update_renderbuffers(__DRIcontext *context,
__DRIdrawable *drawable);
-void intel_prepare_render(struct intel_context *intel);
+void intel_prepare_render(struct brw_context *brw);
void
-intel_resolve_for_dri2_flush(struct intel_context *intel,
+intel_resolve_for_dri2_flush(struct brw_context *brw,
__DRIdrawable *drawable);
extern void