i965: Refactor SIMD16-to-2xSIMD8 checks.

[mesa.git] / src / mesa / drivers / dri / i965 / intel_extensions.c

diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c
index 892a04801cfdef69b17118d8f9a639d77b3f1333..608bfac99958341697abf115e47ce7983db5b0e4 100644 (file)
--- a/src/mesa/drivers/dri/i965/intel_extensions.c
+++ b/src/mesa/drivers/dri/i965/intel_extensions.c
@@ -46,6 +46,10 @@ can_do_pipelined_register_writes(struct brw_context *brw)
    if (brw->gen >= 8)
       return true;
 
+   static int result = -1;
+   if (result != -1)
+      return result;
+
    /* We use SO_WRITE_OFFSET0 since you're supposed to write it (unlike the
     * statistics registers), and we already reset it to zero before using it.
     */
@@ -87,9 +91,12 @@ can_do_pipelined_register_writes(struct brw_context *brw)
 
    /* Check whether the value got written. */
    drm_intel_bo_map(brw->batch.workaround_bo, false);
+   data = brw->batch.workaround_bo->virtual;
    bool success = data[offset] == expected_value;
    drm_intel_bo_unmap(brw->batch.workaround_bo);
 
+   result = success;
+
    return success;
 }
 
@@ -99,6 +106,10 @@ can_write_oacontrol(struct brw_context *brw)
    if (brw->gen < 6 || brw->gen >= 8)
       return false;
 
+   static int result = -1;
+   if (result != -1)
+      return result;
+
    /* Set "Select Context ID" to a particular address (which is likely not a
     * context), but leave all counting disabled.  This should be harmless.
     */
@@ -145,9 +156,12 @@ can_write_oacontrol(struct brw_context *brw)
 
    /* Check whether the value got written. */
    drm_intel_bo_map(brw->batch.workaround_bo, false);
+   data = brw->batch.workaround_bo->virtual;
    bool success = data[offset] == expected_value;
    drm_intel_bo_unmap(brw->batch.workaround_bo);
 
+   result = success;
+
    return success;
 }
 
@@ -163,6 +177,8 @@ intelInitExtensions(struct gl_context *ctx)
    assert(brw->gen >= 4);
 
    ctx->Extensions.ARB_buffer_storage = true;
+   ctx->Extensions.ARB_clear_texture = true;
+   ctx->Extensions.ARB_copy_image = true;
    ctx->Extensions.ARB_depth_buffer_float = true;
    ctx->Extensions.ARB_depth_clamp = true;
    ctx->Extensions.ARB_depth_texture = true;
@@ -170,6 +186,7 @@ intelInitExtensions(struct gl_context *ctx)
    ctx->Extensions.ARB_draw_instanced = true;
    ctx->Extensions.ARB_ES2_compatibility = true;
    ctx->Extensions.ARB_explicit_attrib_location = true;
+   ctx->Extensions.ARB_explicit_uniform_location = true;
    ctx->Extensions.ARB_fragment_coord_conventions = true;
    ctx->Extensions.ARB_fragment_program = true;
    ctx->Extensions.ARB_fragment_program_shadow = true;
@@ -181,6 +198,7 @@ intelInitExtensions(struct gl_context *ctx)
    ctx->Extensions.ARB_map_buffer_range = true;
    ctx->Extensions.ARB_occlusion_query = true;
    ctx->Extensions.ARB_occlusion_query2 = true;
+   ctx->Extensions.ARB_pipeline_statistics_query = true;
    ctx->Extensions.ARB_point_sprite = true;
    ctx->Extensions.ARB_seamless_cube_map = true;
    ctx->Extensions.ARB_shader_bit_encoding = true;
@@ -213,7 +231,6 @@ intelInitExtensions(struct gl_context *ctx)
    ctx->Extensions.EXT_pixel_buffer_object = true;
    ctx->Extensions.EXT_point_parameters = true;
    ctx->Extensions.EXT_provoking_vertex = true;
-   ctx->Extensions.EXT_separate_shader_objects = true;
    ctx->Extensions.EXT_texture_array = true;
    ctx->Extensions.EXT_texture_env_dot3 = true;
    ctx->Extensions.EXT_texture_filter_anisotropic = true;
@@ -227,7 +244,6 @@ intelInitExtensions(struct gl_context *ctx)
    ctx->Extensions.EXT_vertex_array_bgra = true;
    ctx->Extensions.AMD_seamless_cubemap_per_texture = true;
    ctx->Extensions.APPLE_object_purgeable = true;
-   ctx->Extensions.ATI_envmap_bumpmap = true;
    ctx->Extensions.ATI_separate_stencil = true;
    ctx->Extensions.ATI_texture_env_combine3 = true;
    ctx->Extensions.MESA_pack_invert = true;
@@ -242,13 +258,11 @@ intelInitExtensions(struct gl_context *ctx)
    ctx->Extensions.OES_standard_derivatives = true;
    ctx->Extensions.OES_EGL_image_external = true;
 
-   if (brw->gen >= 7)
+   if (brw->gen >= 6)
       ctx->Const.GLSLVersion = 330;
-   else if (brw->gen >= 6)
-      ctx->Const.GLSLVersion = 140;
    else
       ctx->Const.GLSLVersion = 120;
-   _mesa_override_glsl_version(ctx);
+   _mesa_override_glsl_version(&ctx->Const);
 
    if (brw->gen >= 6) {
       uint64_t dummy;
@@ -270,6 +284,9 @@ intelInitExtensions(struct gl_context *ctx)
       ctx->Extensions.ARB_texture_multisample = true;
       ctx->Extensions.ARB_sample_shading = true;
       ctx->Extensions.ARB_texture_gather = true;
+      ctx->Extensions.ARB_conditional_render_inverted = true;
+      ctx->Extensions.AMD_vertex_shader_layer = true;
+      ctx->Extensions.EXT_polygon_offset_clamp = true;
 
       /* Test if the kernel has the ioctl. */
       if (drm_intel_reg_read(brw->bufmgr, TIMESTAMP, &dummy) == 0)
@@ -285,7 +302,7 @@ intelInitExtensions(struct gl_context *ctx)
 
    if (brw->gen >= 7) {
       ctx->Extensions.ARB_conservative_depth = true;
-      ctx->Extensions.AMD_vertex_shader_layer = true;
+      ctx->Extensions.ARB_texture_view = true;
       if (can_do_pipelined_register_writes(brw)) {
          ctx->Extensions.ARB_transform_feedback2 = true;
          ctx->Extensions.ARB_transform_feedback3 = true;
@@ -296,23 +313,23 @@ intelInitExtensions(struct gl_context *ctx)
       /* Only enable this in core profile because other parts of Mesa behave
        * slightly differently when the extension is enabled.
        */
-      if (ctx->API == API_OPENGL_CORE)
+      if (ctx->API == API_OPENGL_CORE) {
          ctx->Extensions.ARB_viewport_array = true;
+         ctx->Extensions.AMD_vertex_shader_viewport_index = true;
+      }
 
-      if (getenv("INTEL_COMPUTE_SHADER"))
-         ctx->Extensions.ARB_compute_shader = true;
-   }
-
-   if (brw->gen == 7) {
-      ctx->Extensions.ARB_texture_view = true;
+      ctx->Extensions.ARB_texture_compression_bptc = true;
+      ctx->Extensions.ARB_derivative_control = true;
    }
 
    if (brw->gen >= 8) {
       ctx->Extensions.ARB_stencil_texturing = true;
    }
 
-   if (brw->gen == 5 || can_write_oacontrol(brw))
+   if (brw->gen == 5 || can_write_oacontrol(brw)) {
       ctx->Extensions.AMD_performance_monitor = true;
+      ctx->Extensions.INTEL_performance_query = true;
+   }
 
    if (ctx->API == API_OPENGL_CORE)
       ctx->Extensions.ARB_base_instance = true;
@@ -326,4 +343,12 @@ intelInitExtensions(struct gl_context *ctx)
 
    if (brw->gen >= 7)
       ctx->Extensions.ARB_shader_atomic_counters = true;
+
+   if (brw->gen == 7)
+      ctx->Extensions.ARB_gpu_shader5 = true;
+
+   ctx->Extensions.OES_texture_float = true;
+   ctx->Extensions.OES_texture_float_linear = true;
+   ctx->Extensions.OES_texture_half_float = true;
+   ctx->Extensions.OES_texture_half_float_linear = true;
 }